• 한국전기전자재료학회논문지
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• 제26권4호
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• pp.321-324
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• 2013

In this study, The RF magnetron sputter and evaporator was on glass substrates 30 mm ${\times}$ 30 mm OMO multilayer thin film structure is applied to the low-e. Structural and optical properties, a thin film was produced, the variable was placed into a variable deposition time of the oxide layer. According to the XRD measurement results there is no peak that satisfies the Bragg's law ($2dsin{\theta}=n{\lambda}$) which confirmed that it is an amorphous structure. RMS value of the results of the AFM measurement, has a roughness of less than 2 nm. transmittance measurements results, visible light region an average 80%, IR region 40% showed.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.471-471
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• 2013

Highly stable and high performance amorphous oxide semiconductor thin film transistors (TFTs) were fabricated using 4-mercaptophenol (4MP) doped ZnO by atomic layer deposition (ALD). The 4 MP concentration in ZnO films were varied from 1.7% to 5.6% by controlling Zn: 4MP pulses. The carrier concentrations in ZnO thin films were controlled from $1.017{\times}10^{20}$/$cm^3$ to $2,903{\times}10^{14}$/$cm^3$ with appropriate amount of 4MP doping. The 4.8% 4MP doped ZnO TFT revealed good device mobility performance of $8.4cm^2V-1s-1$ and on/off current ratio of $10^6$. Such 4MP doped ZnO TFTs were stable under ambient conditions for 12 months without any apparent degradation in their electrical properties. Our result suggests that 4 MP doping can be useful technique to produce more reliable oxide semiconductor TFT.

• Transactions on Electrical and Electronic Materials
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• 제11권5호
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• pp.216-221
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• 2010

The microstructure, electrical properties, and DC-accelerated aging behavior of the Zn-Pr-Co-Cr-Y-Er (ZPCC-YE) varistors were investigated for different amounts of erbium oxide ($Er_2O_3$). The microstructure consisted of zinc oxide grain and an intergranular layer ($Pr_6O_{11}$, $Y_2O_3$, and $Er_2O_3$-rich phase) as a secondary phase. The increase of $Er_2O_3$ amount decreased the average grain size and increased the sintered density. As the $Er_2O_3$ amount increased, the breakdown field increased from 5094 V/cm to 6966 V/cm and the nonlinear coefficient increased from 27.8 to 45.1. The ZPCC-YE varistors added with 0.5 to 1.0 mol% $Er_2O_3$ are appropriate for high voltage, with high nonlinearity and stability against DC-accelerated aging stress.

• 한국전기전자재료학회논문지
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• 제25권9호
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• pp.677-680
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• 2012

The dependency of annealing temperature on the electrical performances in amorphous silicon-zinc-tin-oxide thin film transistors (SZTO-TFT) has been investigated. The SZTO channel layers were prepared by using radio frequency (RF) magnetron sputtering method with different annealing treatment. The field effect mobility (${\mu}_{FE}$) increased and threshold voltage ($V_{th}$) shifted to negative direction with increasing annealing temperature. As a result, oxygen vacancies generated in SZTO channel layer with increasing annealing temperature resulted in negative shift in $V_{th}$ and increase in on-current.

• 대한전자공학회논문지
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• 제15권3호
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• pp.11-17
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• 1978

Medium scale 집적회로인 BCD to seven segment decoder/driver를 P-channel Metal-Oxide-Semiconductor집적회로 제작 기법으로 설계, 제작하였다. 본 소자는 특별히 common cathode seven segment light emitting diode에 적합하도록 설계되었다. decoder logic은 직렬로 연결된 두 개의 Read-Only-Memory로 구성되어 있으며 driver로는 channel이 넓은 FET를 사용하였다. 제작된 집적회로는 전원 전압이 -7 volt에서 -26 volt까지 변화할 때 정상적으로 동작하였으며 LED각 segment 전류의 non-uniformity는 약 ±10%이었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권5호
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• pp.530-537
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• 2013

An explicit surface potential calculation method of gate-all-around MOSFET (GAAMOSFET) devices which takes into account both interface trap charge and varying doping levels is presented. The results of the method are extensively verified by numerical simulation. Results from the model are used to find qualitative and quantitative effect of interface trap charge on subthreshold slope (SS) of GAAMOSFET devices. Further, design constraints of GAAMOSFET devices with emphasis on the effect of interface trap charge on device SS performance are investigated.

• 농업과학연구
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• 제38권3호
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• pp.525-532
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• 2011

The aim of this study was to develop a portable electronic nose system for freshness measurement of meats, which could be an alterative of subjective measurements of human nose and time-consuming measurements of conventional gas chromatograph methods. The portable electronic system was o optimized by comparing the measurement sensitivity and hardware efficiency, such as power consumption and dimension reduction throughout two stages of the prototypes. The electronic nose systems were constructed using an array of four different metal oxide semiconductor sensors. Two different configurations of sensor array with dimension were designed and compared the performance respectively. The final prototype of the system showed much improved performance on saving power consumption and dimension reduction without decrease of measurement sensitivity of pork freshness. The results show the potential of constructing a portable electronic system for the measurement of meat quality with high sensitivity and energy efficiency.

• 반도체디스플레이기술학회지
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• 제14권2호
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• pp.41-45
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• 2015

From 20nm technology node, the finFET has become standard device for ULSI's. However, the finFET process made stacking gate non-volatile memory obsolete. Some reported capacitor-less DRAM structure by utilizing the FBE. We present possible non-volatile memory device structure similar to the dual gate MOSFET. One of the gates is left floating. Since body of the finFET is only 40nm thick, control gate bias can make electron tunneling through the floating gate oxide which sits across the body. For programming, gate is biased to accumulation mode with few volts. Simulation results show that the programming electron current flows at the interface between floating gate oxide and the body. It also shows that the magnitude of the programming current can be easily controlled by the drain voltage. Injected electrons at the floating gate act similar to the body bias which changes the threshold voltage of the device.

• ETRI Journal
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• 제17권4호
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• pp.1-12
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• 1996

A novel body-tied silicon-on-insulator(SOI) n-channel metal-oxide-semiconductor field-effect transistor with grounded body electrode named GBSOI nMOSFET has been developed by wafer bonding and etch-back technology. It has no floating body effect such as kink phenomena on the drain current curves, single-transistor latch and drain current overshoot inherent in a normal SOI device with floating body. We have characterized the interface trap density, kink phenomena on the drain current ($I_{DS}-V_{DS}$) curves, substrate resistance effect on the $I_{DS}-V_{DS}$ curves, subthreshold current characteristics and single transistor latch of these transistors. We have confirmed that the GBSOI structure is suitable for high-speed and low-voltage VLSI circuits.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권6호
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• pp.867-872
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• 2016

We have investigated the channel mobility of AlGaN/GaN-on-Si recessed-metal-oxide-semiconductor-heterojunction field-effect transistors (recessed-MOS-HFET) with $SiO_2$ gate oxide. Both field-effect mobility and effective mobility for the recessed-MOS channel region were extracted as a function of the effective transverse electric field. The maximum field effect mobility was $380cm^2/V{\cdot}s$ near the threshold voltage. The effective channel mobility at the on-state bias condition was $115cm^2/V{\cdot}s$ at which the effective transverse electric field was 340 kV/cm. The influence of the recessed-MOS region on the overall channel mobility of AlGaN/GaN recessed-MOS-HFETs was also investigated.