• 제목/요약/키워드: Oxide Semiconductor

검색결과 1,419건 처리시간 0.025초

Human body model electrostatic discharge tester using metal oxide semiconductor-controlled thyristors

  • Dong Yun Jung;Kun Sik Park;Sang In Kim;Sungkyu Kwon;Doo Hyung Cho;Hyun Gyu Jang;Jongil Won;Jong-Won Lim
    • ETRI Journal
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    • 제45권3호
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    • pp.543-550
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    • 2023
  • Electrostatic discharge (ESD) testing for human body model tests is an essential part of the reliability evaluation of electronic/electrical devices and components. However, global environmental concerns have called for the need to replace the mercury-wetted relay switches, which have been used in ESD testers. Therefore, herein, we propose an ESD tester using metal oxide semiconductor-controlled thyristor (MCT) devices with a significantly higher rising rate of anode current (di/dt) characteristics. These MCTs, which have a breakdown voltage beyond 3000 V, were developed through an in-house foundry. As a replacement for the existing mercury relays, the proposed ESD tester with the developed MCT satisfies all the requirements stipulated in the JS-001 standard for conditions at or below 2000 V. Moreover, unlike traditional relays, the proposed ESD tester does not generate resonance; therefore, no additional circuitry is required for resonant removal. To the best of our knowledge, the proposed ESD tester is the first study to meet the JS-001 specification by applying a new switch instead of an existing mercury-wetted relay.

Analysis Method of Volatile Sulfur Compounds Utilizing Separation Column and Metal Oxide Semiconductor Gas Sensor

  • Han-Soo Kim;Inho Kim;Eun Duck Park;Sang-Do Han
    • 센서학회지
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    • 제33권3호
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    • pp.125-133
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    • 2024
  • Gas chromatography (GC) separation technology and metal oxide semiconductor (MOS) gas sensors have been integrated for the effective analysis of volatile sulfur compounds (VSCs) such as H2S, CH3SH, (CH3)2S, and (CH3)2S2. The separation and detection characteristics of the GC/MOS system using diluted standard gases were investigated for the qualitative and quantitative analysis of VSCs. The typical concentrations of the standard gases were 0.1, 0.5, 1.0, 5.0, and 10.0 ppm. The GC/MOS system successfully separated H2S, CH3SH, (CH3)2S, and (CH3)2S2 using a celite-filled column. The reproducibility of the retention time measurements was at a 3% relative standard deviation level, and the correlation coefficient (R2) for the VSC concentration was greater than 0.99. In addition, the chromatograms of single and mixed gases were almost identical.

p-Si 기판 위에 형성된 $S iO_2/S iN/S iO_2$박막의 특성에 관한 연구 (fabrication and characterization of $S iO_2/S iN/S iO_2$ films on p-Si)

  • 성규석;이세준;김두수;강윤묵;차정호;김현정;정웅;김득영;홍치유;조훈영;강태원
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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    • pp.32-35
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    • 2000
  • Oxide-nitride-oxide(ONO) structures were formed by sequential radio frequency reactive magnetron sputtering method. The chemical composition and structure of these films were studied by using of secondary ion mass spectroscopy(SIMS) and Auger electron spectroscopy(AES) SIMS and AES experiments show the existence of nitridation at the SiO$_2$/Si substrate. The electrical characteristics of ONO films were evaluated by I-V and high frequency C-V measurements When the ONO films were annealed at 90$0^{\circ}C$ for 30 sec in $N_2$ ambient, the breakdown voltage increased and flat-band voltage decreased under high electric field.

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Hafnium Oxide Layer Based Metal-Oxide-Semiconductor (MOS) Capacitors with Annealing Temperature Variation

  • 이나영;최병덕
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.318.1-318.1
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    • 2016
  • Hafnium Oxide (HfOx) has been attracted as a promising gate dielectric for replacing SiO2 in gate stack applications. In this paper, Metal-Oxide-Semiconductor (MOS) capacitor with solution processed HfO2 high-k material as a dielectric were fabricated. The solvent using $HfOCl2{\cdot}8H2O$ dissolve in 2-Methoxy ethanol was prepared at 0.3M. The HfOx layers were deposited on p-type silicon substrate by spin-coating at $250^{\circ}C$ for 5 minutes on a hot plate and repeated the same cycle for 5 times, followed by annealing process at 350, 450 and $550^{\circ}C$ for 2 hours. When the annealing temperature was increased from 350 to $550^{\circ}C$, capacitance value was increased from 337 to 367 pF. That was resulted from the higher temperature of HfOx which have more crystallization phase, therefore dielectric constant (k) was increased from 11 to 12. It leads to the formation of dense HfOx film and improve the ability of the insulator layer. We confirm that HfOx layer have a good performance for dielectric layer in MOS capacitors.

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Indium-Zinc 산화물 박막 트랜지스터 기반의 N-MOS 인버터 (Indium-Zinc Oxide Thin Film Transistors Based N-MOS Inverter)

  • 김한상;김성진
    • 한국전기전자재료학회논문지
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    • 제30권7호
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    • pp.437-440
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    • 2017
  • We report on amorphous thin-film transistors (TFTs) with indium zinc oxide (IZO) channel layers that were fabricated via a solution process. We prepared the IZO semiconductor solution with 0.1 M indium nitrate hydrate and 0.1 M zinc acetate dehydrate as precursor solutions. The solution- processed IZO TFTs showed good performance: a field-effect mobility of $7.29cm^2/Vs$, a threshold voltage of 4.66 V, a subthreshold slope of 0.48 V/dec, and a current on-to-off ratio of $1.62{\times}10^5$. To investigate the static response of our solution-processed IZO TFTs, simple resistor load-type inverters were fabricated by connecting a $2-M{\Omega}$ resistor. Our IZOTFTbased N-MOS inverter performed well at operating voltage, and therefore, isa good candidate for advanced logic circuits and display backplane.

Regulation of precursor solution concentration for In-Zn oxide thin film transistors

  • Chen, Yanping;He, Zhongyuan;Li, Yaogang;Zhang, Qinghong;Hou, Chengyi;Wang, Hongzhi
    • Current Applied Physics
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    • 제18권11호
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    • pp.1300-1305
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    • 2018
  • The tunable electronic performance of the solution-processed semiconductor metal oxide is of great significance for the printing electronics. In current work, transparent thin-film transistors (TFTs) with indium-zinc oxide (IZO) were fabricated as active layer by a simple eco-friendly aqueous route. The aqueous precursor solution is composed of water without any other organic additives and the IZO films are amorphous revealed by the X-ray diffraction (XRD). With systematic studies of atomic force microscopy (AFM), X-ray photoemission spectroscopy (XPS) and the semiconductor property characterizations, it was revealed that the electrical performance of the IZO TFTs is dependent on the concentration of precursor solution. As well, the optimum preparation process was obtained. The concentrations induced the regulation of the electronic performance was clearly demonstrated with a proposed mechanism. The results are expected to be beneficial for development of solution-processed metal oxide TFTs.

플래시메모리를 위한 Scaled SONOSFET NVSM의 프로그래밍 조건과 특성에 관한 연구 (A Study on the Characteristics and Programming Conditions of the Scaled SONOSFET NVSM for Flash Memory)

  • 박희정;박승진;남동우;김병철;서광열
    • 한국전기전자재료학회논문지
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    • 제13권11호
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    • pp.914-920
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    • 2000
  • When the charge-trap type SONOS(polysilicon-oxide-nitride-oxide-semiconductor) cells are used to flash memory, the tunneling program/erase condition to minimize the generation of interface traps was investigated. SONOSFET NVSM(Nonvolatile Semiconductor Memory) cells were fabricated using 0.35 ㎛ standard memory cell embedded logic process including the ONO cell process, based on retrograde twin-well, single-poly, single metal CMOS(Complementary Metal Oxide Semiconductor) process. The thickness of ONO triple-dielectric for the memory cell is tunnel oxide of 24 $\AA$, nitride of 74 $\AA$, blocking oxide of 25 $\AA$, respectively. The program mode(V$\_$g/=7, 8, 9 V, V$\_$s/=V$\_$d/=-3 V, V$\_$b/=floating) and the erase mode(V$\_$g/=-4, -5, -6 V, V$\_$s/=V$\_$d/=floating, V$\_$b/=3 V) by MFN(Modified Fowler-Nordheim) tunneling were used. The proposed programming condition for the flash memory of SONOSFET NVSM cells showed less degradation(ΔV$\_$th/, S, G$\_$m/) characteristics than channel MFN tunneling operation. Also, the program inhibit conditins of unselected cell for separated source lines NOR-type flash memory application were investigated. we demonstrated that the phenomenon of the program disturb did not occur at source/drain voltage of 1 V∼12 V and gate voltage of -8 V∼4 V.

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산화물반도체 박막트랜지스터 제작 및 전기적 특성 분석 (Fabrication and Charaterization of Oxide Thin Film Transistor)

  • 이상렬
    • 한국전기전자재료학회논문지
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    • 제26권4호
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    • pp.275-277
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    • 2013
  • Thin-film transistors(TFTs) with silicon zinc tin oxide(SZTO) channel layer are fabricated by solution-process. The threshold voltage ($V_{th}$) shifted toward positive directly with increasing Si contents in SZTO system. Because the Si has a lower standard electrode potential (SEP) than Sn, Zn, thus degenerate the oxygen vacancy (VO). As a result, the Si act as carrier suppressor and oxygen binder in the SZTO as well as a $V_{th}$ controller.

PMMA 보호막을 이용한 용액 공정 기반의 인듐-이티륨-산화물 트랜지스터에 관한 연구 (Study on Solution Processed Indium-Yttrium-Oxide Thin-Film Transistors Using Poly (Methyl Methacrylate) Passivation Layer)

  • 김한상;김성진
    • 한국전기전자재료학회논문지
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    • 제30권7호
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    • pp.413-416
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    • 2017
  • We investigated solution-processed indium-yttrium-oxide (IYO) TFTs using apoly (methyl methacrylate) (PMMA) passivation layer. The IYO semiconductor solution was prepared with 0.1 M indium nitrate hydrate and 0.1 M yttrium acetate dehydrate as precursor solutions. The solution-processed IYO TFTs showed good performance: field-effect mobility of $13.13cm^2/Vs$, a threshold voltage of 8.2 V, a subthreshold slope of 0.93 V/dec, and a current on-to-off ratio of $7.2{\times}10^6$. Moreover, the PMMA passivation layers used to protectthe IYO active layer of the TFTs, did so without deteriorating their performance under ambient conditions; their operational stability and electrical properties also improved by decreasing leakage current.

12" 웨이퍼 Spin etcher용 실시간 박막두께 측정장치의 개발 (Development of Real Time Thickness Measurement System of Thin Film for 12" Wafer Spin Etcher)

  • 김노유;서학석
    • 반도체디스플레이기술학회지
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    • 제2권2호
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    • pp.9-15
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    • 2003
  • This paper proposes a thickness measurement method of silicon-oxide and poly-silicon film deposited on 12" silicon wafer for spin etcher. Halogen lamp is used as a light source for generating a wide-band spectrum, which is guided and focused on the wafer surface through a optical fiber cable. Interference signal from the film is detected by optical sensor to determine the thickness of the film using spectrum analysis and several signal processing techniques including curve-fitting and adaptive filtering. Test wafers with three kinds of priori-known films, polysilicon(300 nm), silicon-oxide(500 nm) and silicon-oxide(600 nm), are measured while the wafer is spinning at 20 Hz and DI water flowing on the wafer surface. From experiment results the algorithm presented in the paper is proved to be effective with accuracy of maximum 0.8% error.rror.

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