• Title/Summary/Keyword: Oxide Semiconductor

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Characteristics of Crystalline Silicon Solar Cells with Double Layer Antireflection Coating by PECVD (결정질 실리콘 태양전지의 이중 반사방지막 특성에 대한 연구)

  • Kim, Jin-Kuk;Park, Je-Jun;Hong, Ji-Hwa;Kim, Nam-Soo;Kang, Gi-Hwan;Yu, Gwon-Jong;Song, Hee-Eun
    • 한국태양에너지학회:학술대회논문집
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    • 2012.03a
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    • pp.243-247
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    • 2012
  • The paper focuses on an anti-reflection (AR) coating deposited by PECVD in silicon solar cell fabrication. AR coating is effective to reduce the reflection of the light on the silicon wafer surface and then increase substantially the solar cell conversion efficiency. In this work, we carried out experiments to optimize double AR coating layer with silicon nitride and silicon oxide for the silicon solar cells. The p-type mono crystalline silicon wafers with $156{\times}156mm^2$ area, 0.5-3 ${\Omega}{\cdot}cm$ resistivity, and $200{\mu}m$ thickness were used. All wafers were textured in KOH solution, doped with $POCl_3$ and removed PSG before ARC process. The optimized thickness of each ARC layer was calculated by theoretical equation. For the double layer of AR coating, silicon nitride layer was deposited first using $SiH_4$ and $NH_3$, and then silicon oxide using $SiH_4$ and $N_2O$. As a result, reflectance of $SiO_2/SiN_x$ layer was lower than single $SiN_x$ and then it resulted in increase of short-circuit current and conversion efficiency. It indicates that the double AR coating layer is necessary to obtain the high efficiency solar cell with PECVD already used in commercial line.

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Power Generating Characteristics of Zinc Oxide Nanorods Grown on a Flexible Substrate by a Hydrothermal Method

  • Choi, Jae-Hoon;You, Xueqiu;Kim, Chul;Park, Jung-Il;Pak, James Jung-Ho
    • Journal of Electrical Engineering and Technology
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    • v.5 no.4
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    • pp.640-645
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    • 2010
  • This paper describes the power generating property of hydrothermally grown ZnO nanorods on a flexible polyethersulfone (PES) substrate. The piezoelectric currents generated by the ZnO nanorods were measured when bending the ZnO nanorod by using I-AFM, and the measured piezoelectric currents ranged from 60 to 100 pA. When the PtIr coated tip bends a ZnO nanorod, piezoelectrical asymmetric potential is created on the nanorod surface. The Schottky barrier at the ZnO-metal interface accumulates elecntrons and then release very quickly generating the currents when the tip moves from tensile to compressed part of ZnO nanorod. These ZnO nanorods were grown almost vertically with the length of 300-500 nm and the diameter of 30-60 nm on the Ag/Ti/PES substrate at $90^{\circ}C$ for 6 hours by hydrothermal method. The metal-semiconductor interface property was evaluated by using a HP 4145B Semiconductor Parameter Analyzer and the piezoelectric effect of the ZnO nanorods were evaluated by using an I-AFM. From the measured I-V characteristics, it was observed that ZnO-Ag and ZnO-Au metal-semiconductor interfaces showed an ohmic and a Schottky contact characteristics, respectively. ANSYS finite element simulation was performed in order to understand the power generation mechanism of the ZnO nanorods under applied external stress theoretically.

Hybrid complementary circuits based on organic/inorganic flexible thin film transistors with PVP/Al2O3 gate dielectrics

  • Kim, D.I.;Seol, Y.G.;Lee, N.E.;Woo, C.H.;Ahn, C.H.;Ch, H.K.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.479-479
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    • 2011
  • Flexible inverters based on complementary thin-film transistor (CTFTs) are important because they have low power consumption and other advantages over single type TFT inverters. In addition, integrated CTFTs in flexible electronic circuits on low-cost, large area and mechanically flexible substrates have potentials in various applications such as radio-frequency identification tags (RFIDs), sensors, and backplanes for flexible displays. In this work, we introduce flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The CTFTs were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. Basic electrical characteristics of individual transistors and the whole CTFTs were measured by a semiconductor parameter analyzer (HP4145B, Agilent Technologies) at room temperature in the dark. Performance of those devices then was measured under static and dynamic mechanical deformation. Effects of cyclic bending were also examined. The voltage transfer characteristics (Vout- Vin) and voltage gain (-dVout/dVin) of flexible inverter circuit were analyzed and the effects of mechanical bending will be discussed in detail.

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High Performance Current-Mode DC-DC Boost Converter in BiCMOS Integrated Circuits

  • Lee, Chan-Soo;Kim, Eui-Jin;Gendensuren, Munkhsuld;Kim, Nam-Soo;Na, Kee-Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.6
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    • pp.262-266
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    • 2011
  • A simulation study of a current-mode direct current (DC)-DC boost converter is presented in this paper. This converter, with a fully-integrated power module, is implemented by using bipolar complementary metal-oxide semiconductor (BiCMOS) technology. The current-sensing circuit has an op-amp to achieve high accuracy. With the sense metal-oxide semiconductor field-effect transistor (MOSFET) in the current sensor, the sensed inductor current with the internal ramp signal can be used for feedback control. In addition, BiCMOS technology is applied to the converter, for accurate current sensing and low power consumption. The DC-DC converter is designed with a standard 0.35 ${\mu}m$ BiCMOS process. The off-chip inductor-capacitor (LC) filter is operated with an inductance of 1 mH and a capacitance of 12.5 nF. Simulation results show the high performance of the current-sensing circuit and the validity of the BiCMOS converter. The output voltage is found to be 4.1 V with a ripple ratio of 1.5% at the duty ratio of 0.3. The sensing current is measured to be within 1 mA and follows to fit the order of the aspect ratio, between sensing and power FET.

Advances in Power Semiconductor Devices for Automotive Power Inverters: SiC and GaN (전기자동차 파워 인버터용 전력반도체 소자의 발전: SiC 및 GaN)

  • Dongjin Kim;Junghwan Bang;Min-Su Kim
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.2
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    • pp.43-51
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    • 2023
  • In this paper, we introduce the development trends of power devices which is the key component for power conversion system in electric vehicles, and discuss the characteristics of the next-generation wide-bandgap (WBG) power devices. We provide an overview of the characteristics of the present mainstream Si insulated gate bipolar transistor (IGBT) devices and technology roadmap of Si IGBT by different manufacturers. Next, recent progress and advantages of SiC metal-oxide-semiconductor field-effect transistor (MOSFET) which are the most important unipolar devices, is described compared with conventional Si IGBT. Furthermore, due to the limitations of the current GaN power device technology, the issues encountered in applying the power conversion module for electric vehicles were described.

Boosting up the photoconductivity and relaxation time using a double layered indium-zinc-oxide/indium-gallium-zinc-oxide active layer for optical memory devices

  • Lee, Minkyung;Jaisutti, Rawat;Kim, Yong-Hoon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.278-278
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    • 2016
  • Solution-processed metal-oxide semiconductors have been considered as the next generation semiconducting materials for transparent and flexible electronics due to their high electrical performance. Moreover, since the oxide semiconductors show high sensitivity to light illumination and possess persistent photoconductivity (PPC), these properties can be utilized in realizing optical memory devices, which can transport information much faster than the electrons. In previous works, metal-oxide semiconductors are utilized as a memory device by using the light (i.e. illumination does the "writing", no-gate bias recovery the "reading" operations) [1]. The key issues for realizing the optical memory devices is to have high photoconductivity and a long life time of free electrons in the oxide semiconductors. However, mono-layered indium-zinc-oxide (IZO) and mono-layered indium-gallium-zinc-oxide (IGZO) have limited photoconductivity and relaxation time of 570 nA, 122 sec, 190 nA and 53 sec, respectively. Here, we boosted up the photoconductivity and relaxation time using a double-layered IZO/IGZO active layer structure. Solution-processed IZO (top) and IGZO (bottom) layers are prepared on a Si/SiO2 wafer and we utilized the conventional thermal annealing method. To investigate the photoconductivity and relaxation time, we exposed 9 mW/cm2 intensity light for 30 sec and the decaying behaviors were evaluated. It was found that the double-layered IZO/IGZO showed high photoconductivity and relaxation time of 28 uA and 1048 sec.

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Simulation Study on Silicon-Based Floating Body Synaptic Transistor with Short- and Long-Term Memory Functions and Its Spike Timing-Dependent Plasticity

  • Kim, Hyungjin;Cho, Seongjae;Sun, Min-Chul;Park, Jungjin;Hwang, Sungmin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.5
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    • pp.657-663
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    • 2016
  • In this work, a novel silicon (Si) based floating body synaptic transistor (SFST) is studied to mimic the transition from short-term memory to long-term one in the biological system. The structure of the proposed SFST is based on an n-type metal-oxide-semiconductor field-effect transistor (MOSFET) with floating body and charge storage layer which provide the functions of short- and long-term memories, respectively. It has very similar characteristics with those of the biological memory system in the sense that the transition between short- and long-term memories is performed by the repetitive learning. Spike timing-dependent plasticity (STDP) characteristics are closely investigated for the SFST device. It has been found from the simulation results that the connectivity between pre- and post-synaptic neurons has strong dependence on the relative spike timing among electrical signals. In addition, the neuromorphic system having direct connection between the SFST devices and neuron circuits are designed.

Characteristics Evaluation of Al2O3 ALD Thin Film Exposed to Constant Temperature and Humidity Environment (항온항습 환경에 노출된 Al2O3 ALD 박막의 특성 평가)

  • Kim, Hyeun Woo;Song, Tae Min;Lee, Hyeong Jun;Jeon, Yongmin;Kwon, Jeong Hyun
    • Journal of the Semiconductor & Display Technology
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    • v.21 no.2
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    • pp.11-14
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    • 2022
  • In this work, we evaluated the Al2O3 film, which was deposited by atomic layer deposition, degraded by exposure to harsh environments. The Al2O3 films deposited by atomic layer deposition have long been used as a gas diffusion barrier that satisfies barrier requirements for device reliability. To investigate the barrier and mechanical performance of the Al2O3 film with increasing temperature and relative humidity, the properties of the degraded Al2O3 film exposed to the harsh environment were evaluated using electrical calcium test and tensile test. As a result, the water vapor transmission rate of Al2O3 films stored in harsh environments has fallen to a level that is difficult to utilize as a barrier film. Through water vapor transmission rate measurements, it can be seen that the water vapor transmission rate changes can be significant, and the environment-induced degradation is fatal to the Al2O3 thin films. In addition, the surface roughness and porosity of the degraded Al2O3 are significantly increased as the environment becomes severer. the degradation of elongation is caused by the stress concentration at valleys of rough surface and pores generated by the harsh environment. Becaused the harsh envronment-induced degradation convert amorphous Al2O3 to crystalline structure, these encapsulation properties of the Al2O3 film was easily degraded.

Research Trend of High Aspect Ratio Contact Etching used in Semiconductor Memory Device Manufacturing (반도체 메모리 소자 제조에서 High Aspect Ratio Contact 식각 연구 동향)

  • Hyun-Woo Tak;Myeong-Ho Park;Jun-Soo Lee;Chan-Hyuk Choi;Bong-Sun Kim;Jun-Ki Jang;Eun-Koo Kim;Dong-Woo Kim;Geun-Young Yeom
    • Journal of the Korean institute of surface engineering
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    • v.57 no.3
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    • pp.165-178
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    • 2024
  • In semiconductor memory device manufacturing, the capability for high aspect ratio contact (HARC) etching determines the density of memory device. Given that there is no standardized definition of "high" in high aspect ratio, it is crucial to continuously monitor recent technology trends to address technological gaps. Not only semiconductor memory manufacturing companies such as Samsung Electronics, SK Hynix, and Micron but also semiconductor manufacturing equipment companies such as Lam Research, Applied Materials, Tokyo Electron, and SEMES release annual reports on HARC etching technology. Although there is a gap in technological focus between semiconductor mass production environments and various research institutes, the results from these institutes significantly contribute by demonstrating fundamental mechanisms with empirical evidence, often in collaboration with industry researchers. This paper reviews recent studies on HARC etching and the study of dielectric etching in various technologies.

Nano-Floating Gate Memory Devices with Metal-Oxide Nanoparticles in Polyimide Dielectrics

  • Kim, Eun-Kyu;Lee, Dong-Uk;Kim, Seon-Pil;Lee, Tae-Hee;Koo, Hyun-Mo;Shin, Jin-Wook;Cho, Won-Ju;Kim, Young-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.1
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    • pp.21-26
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    • 2008
  • We fabricated nano-particles of ZnO, $In_2O_3$ and $SnO_2$ by using the chemical reaction between metal thin films and polyamic acid. The average size and density of these ZnO, $In_2O_3$ and $SnO_2$ nano-particles was approximately 10, 7, and 15 nm, and $2{\times}10^{11},\;6{\times}10^{11},\;2.4{\times}10^{11}cm^{-2}$, respectively. Then, we fabricated nano-floating gate memory (NFGM) devices with ZnO and $In_2O_3$ nano-particles embedded in the devices' polyimide dielectrics and silicon dioxide layers as control and tunnel oxides, respectively. We measured the current-voltage characteristics, endurance properties and retention times of the memory devices using a semiconductor parameter analyzer. In the $In_2O_3$ NFGM, the threshold voltage shift (${\Delta}V_T$) was approximately 5 V at the initial state of programming and erasing operations. However, the memory window rapidly decreased after 1000 s from 5 to 1.5 V. The ${\Delta}V_T$ of the NFGM containing ZnO was approximately 2 V at the initial state, but the memory window decreased after 1000 s from 2 to 0.4 V. These results mean that metal-oxide nano-particles have feasibility to apply NFGM devices.