JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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Simulation Study on Silicon-Based Floating Body Synaptic Transistor with Short- and Long-Term Memory Functions and Its Spike Timing-Dependent Plasticity

  • Kim, Hyungjin (Inter-university Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University) ;
  • Cho, Seongjae (Department of Electronic Engineering, Gachon University) ;
  • Sun, Min-Chul (System LSI, Semiconductor Business Group, Samsung Electronics Co. Ltd.) ;
  • Park, Jungjin (Inter-university Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University) ;
  • Hwang, Sungmin (Department of electrical engineering, Seoul National University) ;
  • Park, Byung-Gook (Inter-university Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University)
  • Received : 2016.03.07
  • Accepted : 2016.06.03
  • Published : 2016.10.30
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Abstract

In this work, a novel silicon (Si) based floating body synaptic transistor (SFST) is studied to mimic the transition from short-term memory to long-term one in the biological system. The structure of the proposed SFST is based on an n-type metal-oxide-semiconductor field-effect transistor (MOSFET) with floating body and charge storage layer which provide the functions of short- and long-term memories, respectively. It has very similar characteristics with those of the biological memory system in the sense that the transition between short- and long-term memories is performed by the repetitive learning. Spike timing-dependent plasticity (STDP) characteristics are closely investigated for the SFST device. It has been found from the simulation results that the connectivity between pre- and post-synaptic neurons has strong dependence on the relative spike timing among electrical signals. In addition, the neuromorphic system having direct connection between the SFST devices and neuron circuits are designed.

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References

  1. D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, "The missing memristor found," Nature, vol. 453, pp. 80-83, May 2008. https://doi.org/10.1038/nature06932
  2. S. H. Jo, T. Chang, I. Ebong, B. B. Bhadviya, P. Mazumder, and W. Lu, "Nanoscale memristor device as synapse in neuromorphic systems," Nano Lett., vol. 10, pp. 1297-1301, Mar. 2010. https://doi.org/10.1021/nl904092h
  3. O. Bichler, W. Zhao, F. Alibart, S. Pleutin, D. Vuillaume, and C. Gamrat, "Functional model of a nanoparticle organic memory transistor for use as a spiking synapse," IEEE Trans. on Electron Devices, vol. 57, pp. 3115-3122, Nov. 2010. https://doi.org/10.1109/TED.2010.2065951
  4. S. Ramakrishnan, P. E. Hasler, and C. Gordon, "Floating gate synapses with spike-time-dependent plasticity," IEEE Trans. on Biomed. Circuits Syst., vol. 5, pp. 244-252, Jun. 2011. https://doi.org/10.1109/TBCAS.2011.2109000
  5. T. Ohno, T. Hasegawa, T. Tsuruoka, K. Terabe, J. K. Gimzewski, and M. Aono, "Short-term plasticity and long-term potentiation mimicked in single inorganic synapses," Nature Mater., vol. 10, pp. 591-595, Nov. 2011. https://doi.org/10.1038/nmat3054
  6. Z. Q. Wang, H. Y. Xu, X. H. Li, H. Yu, Y. C. Liu, and X. J. Zhu, "Synaptic learning and memory functions achieved using oxygen ion migration/diffusion in an amorphous InGaZnO memristor," Adv. Funct. Mater., vol. 22, pp. 2759-2765, Jul. 2012. https://doi.org/10.1002/adfm.201103148
  7. J. Shi, S. D. Ha, Y. Zhou, F. Schoofs, and S. Ramanathan, "A correlated nickelate synaptic transistor," Nat. Commun., vol. 4, Oct. 2013.
  8. S. Yu, Y. Wu, R. Jeyasingh, D. Kuzum, and H.-S. P. Wong, "An electronic synapse device based on metal oxide resistive switching memory for neuromorphic computation," IEEE Trans. on Electron Devices, vol. 58, pp. 2729-2737, Aug. 2011. https://doi.org/10.1109/TED.2011.2147791
  9. S. Park, J. Noh, M.-L. Choo, A. M. Sheri, M. Chang, Y.-B. Kim, et al., "Nanoscale RRAM-based synaptic electronics: toward a neuromorphic computing device," Nanotechnology, vol. 24, p. 384009, Sep. 2013. https://doi.org/10.1088/0957-4484/24/38/384009
  10. M. Chu, B. Kim, S. Park, H. Hwang, M. Jeon, B. H. Lee, et al., "Neuromorphic Hardware System for Visual Pattern Recognition with Memristor Array and CMOS Neuron," IEEE Trans. on Ind. Electron., vol. 62, pp. 2410-2419, Apr. 2015.
  11. T. Dunwiddie and G. Lynch, "Long- term potentiation and depression of synaptic responses in the rat hippocampus: localization and frequency dependency," J. Physiol., vol. 276, pp. 353-367, Mar. 1978. https://doi.org/10.1113/jphysiol.1978.sp012239
  12. P. Goelet, V. F. Castellucci, S. Schacher, and E. R. Kandel, "The long and the short of long-term memory: A molecular framework," Nature, vol. 322, pp. 419-422, Jul. 1986. https://doi.org/10.1038/322419a0
  13. T. V. Bliss and G. L. Collingridge, "A synaptic model of memory: long-term potentiation in the hippocampus," Nature, vol. 361, pp. 31-39, Jan. 1993. https://doi.org/10.1038/361031a0
  14. E. R. Kandel, "The molecular biology of memory storage: a dialogue between genes and synapses," Science, vol. 294, pp. 1030-1038, Nov. 2001. https://doi.org/10.1126/science.1067020
  15. R. C. Froemke and Y. Dan, "Spike-timingdependent synaptic modification induced by natural spike trains," Nature, vol. 416, pp. 433-438, Mar. 2002. https://doi.org/10.1038/416433a
  16. E. Campanac and D. Debanne, "Spike timingdependent plasticity: a learning rule for dendritic integration in rat CA1 pyramidal neurons," J. Physiol., vol. 586, pp. 779-793, Feb. 2008. https://doi.org/10.1113/jphysiol.2007.147017
  17. N. L. Golding, N. P. Staff, and N. Spruston, "Dendritic spikes as a mechanism for cooperative long-term potentiation," Nature, vol. 418, pp. 326-331, Jul. 2002. https://doi.org/10.1038/nature00854
  18. P. J. Sjostrom and M. Hausser, "A cooperative switch determines the sign of synaptic plasticity in distal dendrites of neocortical pyramidal neurons," Neuron, vol. 51, pp. 227-238, Jul. 2006. https://doi.org/10.1016/j.neuron.2006.06.017
  19. P. J. Sjostrom, E. A. Rancz, A. Roth, and M. Hausser, "Dendritic excitability and synaptic plasticity," Physiol. Rev., vol. 88, pp. 769-840, Apr. 2008. https://doi.org/10.1152/physrev.00016.2007
  20. H. Kim, J. Park, M.-W. Kwon, J.-H. Lee, and B.-G. Park, "Silicon-based Floating-body Synaptic Transistor with Frequency Dependent Short-and Long-Term Memories," IEEE Electron Device Lett., vol. 37, pp. 249-252, 2016. https://doi.org/10.1109/LED.2016.2521863
  21. ATLAS User's Manual - Device Simulation Software 2015 Silvaco Inc. Santa Clara CA USA.
  22. S. Selberherr, "Analysis and simulation of semiconductor devices," Springer Science & Business Media, 1984.
  23. S. Tam, P.-K. Ko, and C. Hu, "Lucky-electron model of channel hot-electron injection in MOSFET's," IEEE Trans. on Electron Devices, vol. 31, pp. 1116-1125, Sep. 1984. https://doi.org/10.1109/T-ED.1984.21674
  24. S. Okhonin, M. Nagoga, and P. Fazan, "Principles of transient charge pumping on partially depleted SOI MOSFETs," IEEE Electron Device Lett., vol. 23, pp. 279-281, May 2002. https://doi.org/10.1109/55.998876
  25. H. Jeong, K.-W. Song, I. H. Park, T.-H. Kim, Y. S. Lee, S.-G. Kim, J. Seo, K. Cho, K. Lee, H. Shin, J. D. Lee, and B.-G. Park, "A new capacitorless 1T DRAM cell: Surrounding gate MOSFET with vertical channel (SGVC cell)," IEEE Trans. on Nanotechnol., vol. 6, pp. 352-357, May 2007. https://doi.org/10.1109/TNANO.2007.893575
  26. T. Tanaka, E. Yoshida, and T. Miyashita, "Scalability study on a capacitorless 1T-DRAM: from single-gate PD-SOI to double-gate FinDRAM," in IEEE Intl. Electron Devices Meeting Tech. Dig., pp. 919-922, 2004.

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