• Transactions on Electrical and Electronic Materials
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• v.17 no.4
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• pp.189-195
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• 2016

Micro Hotplate (MHP) is the key component in micro-sensors, particularly gas sensors. Indeed, in metal oxide gas sensors MOX, micro-heater is used as a hotplate in order to control the temperature of the sensing layer which should be in the requisite temperature range over the heater area, so as to detect the resistive changes as a function of varying concentration of different gases. Hence, their design is a very important aspect. In this paper, we have presented the design and simulation results of a meander micro heater based on three different materials - platinum, titanium and tungsten. The dielectric membrane size is 1.4 mm × 1.6 mm with a thickness of 1.4 μm. Above the membrane, a meander heating film was deposed with a thickness of 100 nm. In order to optimize the geometry, a comparative study by simulating two different heater thicknesses, then two inter track widths has also been presented. Power consumption and temperature distribution were determined in the micro heater´s structure over a supply voltage of 5, 6, and 7 V.

• Korean Journal of Optics and Photonics
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• v.1 no.1
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• pp.73-86
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• 1990

The technique of Spectroscopic Ellipsometry (SE) has been examined with emphasis on its inherent sensitivity to the existence of thin films or surface equivalents. A brief review of related theories like the Fresnel reflection coefficients, the effect of a multilayer upon reflectivities, together with the validity of the effective medium theory and the modelling procedure, is followed by a short description of the experimental setup of a rotating polarizer type SE as well as the necessful expressions which lead to tan and cos. Out of its numerous, successful applications, a few are exampled to convince a reader that SE can be applied to a variety of research fields related to surface, interface and thin films. Specifically, those are adsorption and/or desorption on metals or semiconductors, oxidation process, formation of passivation layers on an electrode, thickness determination, interface between semiconductor and its oxide, semiconductor heterojunctions, surface microroughness, void distribution of dielectric, optical thin films, depth profile of multilayered samples, in-situ or in-vitro characterization of a solid surface immersed in electrolyte during electrochemical, chemical, or biological treatments, and so on. It is expected that the potential capability of SE will be widely utilized in a very near future, taking advantage of its sensitivity to thin films or surface equivalents, and its nondestructive, nonperturbing characteristics.

• Safety and Health at Work
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• v.12 no.3
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• pp.403-415
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• 2021

Background: This study aimed to assess the possibility of benzene exposure in workers of a Korean semiconductor manufacturing company by reviewing the issued patents. Methods: A systematic patent search was conducted with the Google "Advanced Patent Search" engine using the keywords "semiconductor" and "benzene" combined with all of the words accessed on January 24, 2016. Results: As a result of the search, we reviewed 75 patent documents filed by a Korean semiconductor manufacturing company from 1994 to 2010. From 22 patents, we found that benzene could have been used as one of the carbon sources in chemical vapor deposition for capacitor; as diamond-like carbon for solar cell, graphene formation, or etching for transition metal thin film; and as a solvent for dielectric film, silicon oxide layer, nanomaterials, photoresist, rise for immersion lithography, electrophotography, and quantum dot ink. Conclusion: Considering the date of patent filing, it is possible that workers in the chemical vapor deposition, immersion lithography, and graphene formation processes could be exposed to benzene from 1996 to 2010.

• Journal of the Semiconductor & Display Technology
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• v.16 no.2
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• pp.66-69
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• 2017

In this paper, solution based Indium Zinc Oxide thin film transistors (IZO TFTs) were fabricated with PVP gate dielectric. To enhance the electrical properties, UV-O3 treatment is proposed on solution based IZO TFTs. The gate leakage current and interface trap density is compatible with conventional ZnO-based TFT with inorganic gate insulator. Especially, the UV-treated device shows improved electrical characteristics compared to the untreated device. These results can be explained by X-ray photoelectron spectroscopy (XPS) analysis, which shows that the oxygen vacancy of UV-O3 treatment is higher than that of no treatment.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.2
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• pp.148-153
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• 2024

As complementary metal-oxide semiconductor (CMOS) is scaled down to achieve higher chip density, thin-film layers have been deposited iteratively. The poor film uniformity resulting from deposition or chemical mechanical planarization (CMP) significantly affects chip yield. Therefore, the development of novel fabrication processes to enhance film uniformity is required. In this context, high-pressure deuterium annealing (HPDA) is proposed to reduce the surface roughness resulting from the CMP. The HPDA is carried out in a diluted deuterium atmosphere to achieve cost-effectiveness while maintaining high pressure. To confirm the effectiveness of HPDA, time-of-flight secondary-ion mass spectrometry (ToF-SIMS) and atomic force microscopy (AFM) are employed. It is confirmed that the absorbed deuterium gas facilitates the diffusion of silicon atoms, thereby reducing surface roughness.

• Journal of the Korean Vacuum Society
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• v.21 no.5
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• pp.273-278
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• 2012

Over the last decade, the hafnium-based gate dielectric materials have been studied for many application fields. Because these materials had excellent behaviors for suppressing the quantum-mechanical tunneling through the thinner dielectric layer with higher dielectric constant (high-K) than $SiO_2$ gate oxides. Although high-K materials compensated the deterioration of electrical properties for decreasing the thickness of dielectric layer in MOSFET structure, their nano-mechanical properties of $HfO_2$ thin film features were hardly known. Thus, we examined nano-mechanical properties of the Hafnium oxide ($HfO_2$) thin film in order to optimize the gate dielectric layer. The $HfO_2$ thin films were deposited by rf magnetron sputter using hafnium (99.99%) target according to various oxygen gas flows. After deposition, the $HfO_2$ thin films were annealed after annealing at $400^{\circ}C$, $600^{\circ}C$ and $800^{\circ}C$ for 20 min in nitrogen ambient. From the results, the current density of $HfO_2$ thin film for 8 sccm oxygen gas flow became better performance with increasing annealing temperature. The nano-indenter and Weibull distribution were measured by a quantitative calculation of the thin film stress. The $HfO_2$ thin film after annealing at $400^{\circ}C$ had tensile stress. However, the $HfO_2$ thin film with increasing the annealing temperature up to $800^{\circ}C$ had changed compressive stress. This could be due to the nanocrystal of the $HfO_2$ thin film. In particular, the $HfO_2$ thin film after annealing at $400^{\circ}C$ had lower tensile stress, such as 5.35 GPa for the oxygen gas flow of 4 sccm and 5.54 GPa for the oxygen gas flow of 8 sccm. While the $HfO_2$ thin film after annealing at $800^{\circ}C$ had increased the stress value, such as 9.09 GPa for the oxygen gas flow of 4 sccm and 8.17 GPa for the oxygen gas flow of 8 sccm. From these results, the temperature dependence of stress state of $HfO_2$ thin films were understood.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.69-74
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• 2010

A new package substrate for dynamic random access memory(DRAM) devices has been developed using selective aluminum anodization. Unlike the conventional substrate structure commonly made by laminating epoxy-based core and copper clad, this substrate consists of bottom aluminum, middle anodic aluminum oxide and top copper. Anodization process on the aluminum substrate provides thick aluminum oxide used as a dielectric layer in the package substrate. Placing copper traces on the anodic aluminum oxide layer, the resulting two-layer metal structure is completed in the package substrate. Selective anodization process makes it possible to construct a fully filled via structure. Also, putting vias directly in the bonding pads and the ball pads in the substrate design, via in pad structure is applied in this work. These arrangement of via in pad and two-layer metal structure make routing easier and thus provide more design flexibility. In a substrate design, all signal lines are routed based on the transmission line scheme of finite-width coplanar waveguide or microstrip with a characteristic impedance of about $50{\Omega}$ for better signal transmission. The property and performance of anodic alumina based package substrate such as layer structure, design method, fabrication process and measurement characteristics are investigated in detail.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.477-477
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• 2008

For more than three decades, the gate dielectrics in CMOS devices are $SiO_2$ because of its blocking properties of current in insulated gate FET channels. As the dimensions of feature size have been scaled down (width and the thickness is reduced down to 50 urn and 2 urn or less), gate leakage current is increased and reliability of $SiO_2$ is reduced. Many metal oxides such as $TiO_2$, $Ta_2O_4$, $SrTiO_3$, $Al_2O_3$, $HfO_2$ and $ZrO_2$ have been challenged for memory devices. These materials posses relatively high dielectric constant, but $HfO_2$ and $Al_2O_3$ did not provide sufficient advantages over $SiO_2$ or $Si_3N_4$ because of reaction with Si substrate. Recently, $HfO_2$ have been attracted attention because Hf forms the most stable oxide with the highest heat of formation. In addition, Hf can reduce the native oxide layer by creating $HfO_2$. However, new gate oxide candidates must satisfy a standard CMOS process. In order to fabricate high density memories with small feature size, the plasma etch process should be developed by well understanding and optimizing plasma behaviors. Therefore, it is necessary that the etch behavior of $HfO_2$ and plasma parameters are systematically investigated as functions of process parameters including gas mixing ratio, rf power, pressure and temperature to determine the mechanism of plasma induced damage. However, there is few studies on the the etch mechanism and the surface reactions in $BCl_3$ based plasma to etch $HfO_2$ thin films. In this work, the samples of $HfO_2$ were prepared on Si wafer with using atomic layer deposition. In our previous work, the maximum etch rate of $BCl_3$/Ar were obtained 20% $BCl_3$/ 80% Ar. Over 20% $BCl_3$ addition, the etch rate of $HfO_2$ decreased. The etching rate of $HfO_2$ and selectivity of $HfO_2$ to Si were investigated with using in inductively coupled plasma etching system (ICP) and $BCl_3/Cl_2$/Ar plasma. The change of volume densities of radical and atoms were monitored with using optical emission spectroscopy analysis (OES). The variations of components of etched surfaces for $HfO_2$ was investigated with using x-ray photo electron spectroscopy (XPS). In order to investigate the accumulation of etch by products during etch process, the exposed surface of $HfO_2$ in $BCl_3/Cl_2$/Ar plasma was compared with surface of as-doped $HfO_2$ and all the surfaces of samples were examined with field emission scanning electron microscopy and atomic force microscope (AFM).

• Journal of the Korean Vacuum Society
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• v.22 no.2
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• pp.55-65
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• 2013

Sterilization of Neurospora crassa has been investigated in this research by using a surface air plasma with dielectric barrier discharged (DBD) structure under atmospheric pressure. The sinusoidal alternating current has been used in this experiment with discharge voltage of 1.4~2.3 kV. The phase difference between the voltage and current signals are found to be almost 80 degree due to the capacitive property of dielectric barrier. Temperature on the biomaterials has been minimized by radiating the heat with the air cooling system. It is noted that the substrate temperature remains under 37 degree for plasma exposure time of 10 minutes with operation of cooler system. It is found that the ozone, $O_3$, has been measured to be about 25~30 ppm within 1 cm region and to be about 5 ppm at the 150 cm downstream region away from the suface plasma. It is also noted that the nitric oxide, NO, and nitric dioxide, $NO_2$, are not nearly detected. Germination rate and mitochodrial activity of Neurospora crassa immersed in the deionized water have been found to be drastically decreased as the plasma treatment time and its electrical power are increased in this experiment. Here, the mitochondrial activity has been analyzed by MTT (3-(4,5-dimethy lthiazol-2yl)-2,5-diphenyl-2H-tetrazolium bromide) assay. However, sterilization of Neurospora crassa immersed in the Vogel's minimal media has been found to be low by plasma treatment, which is caused by surrounding background solution. This research shows the sterilization possibility of Neurospora crassa by using the noncontated surface DBD plasma, which is different from the plasma jet. This is mainly attibuted to the reactive species generated by the surface plasma, since they play a major role for inhibition of micobes such as Neurospora crassa.

• Korean Journal of Materials Research
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• v.22 no.2
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• pp.61-65
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• 2012

A $Li_2O-2SiO_2$ ($LS_2$) glass was investigated as a lithium-ion conducting oxide glass, which is applicable to a fast ionic conductor even at low temperature due to its high mechanical strength and chemical stability. The $Li_2O-2SiO_2$ glass is likely to be broken into small pieces when quenched; thus, it is difficult to fabricate a specifically sized sample. The production of properly sized glass samples is necessary for device applications. In this study, we applied spark plasma sintering (SPS) to fabricate $LS_2$ glass samples which have a particular size as well as high transparency. The sintered samples, $15mm\phi{\times}2mmT$ in size, ($LS_2$-s) were produced by SPS between $480^{\circ}C$ and $500^{\circ}C$ at 45MPa for 3~5mim, after which the thermal and dielectric properties of the $LS_2$-s samples were compared with those of quenched glass ($LS_2$-q) samples. Thermal behavior, crystalline structure, and electrical conductivity of both samples were analyzed by differential scanning calorimetry (DSC), X-ray diffraction (XRD) and an impedance/gain-phase analyzer, respectively. The results showed that the $LS_2$-s had an amorphous structure, like the $LS_2$-q sample, and that both samples took on the lithium disilicate structure after the heat treatment at $800^{\circ}C$. We observed similar dielectric peaks in both of the samples between room temperature and $700^{\circ}C$. The DC activation energies of the $LS_2$-q and $LS_2$-s samples were $0.48{\pm}0.05eV$ and $0.66{\pm}0.04eV$, while the AC activation energies were $0.48{\pm}0.05eV$ and $0.68{\pm}0.04eV$, respectively.