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Evaluation of Energy Self-Sufficiency Rate through Case Analysis of Building Energy Efficiency Rating in Educational Facilities (교육시설의 건축물에너지효율등급 사례분석을 통한 에너지자립률 평가)

  • Lee, Hyun-Seung;Kim, Ji-Hyeon;Lee, Seung-Min;Meang, Joon-Ho;Shin, U-Cheul
    • The Journal of Sustainable Design and Educational Environment Research
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    • v.18 no.4
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    • pp.58-65
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    • 2019
  • Under the regulation of rational energy use in public institutions, it has been mandatory for educational facilities to meet the first grade or higher since 2014. Also the regulation has forced educational facilities as public institutions to use renewable energy since September 2008. Educational facilities are required to be qualified as zero-energy buildings from 2020 under the revision of the Green Building Act. In this study, we identified the current status of the building energy efficiency rating system and the renewable energy system installation for 316 educational facilities that were accredited as "building energy efficiency rating system" from February 2015 to March 2019. Also we analyzed the energy self-sufficiency rate based on energy requirements and renewable energy output. Of the 316 facilities, 12 had 1++ and 293 had 1++ for the "Building Energy Efficiency Rating System". Among the 12 facilities which had 1+++, 11 recorded ZEB level 5 or higher, and 28 out of the 293 facilities(11%) which got received 1++ had ZEB level 5. Thus, it is impossible to implement the ZEB certification system for educational facilities under the present conditions. Expanding the ratio of 1+++ and investing in renewable energy systems should be preceded.

Implementation of Analog Signal Processing ASIC for Vibratory Angular Velocity Detection Sensor (진동형 각속도 검출 센서를 위한 애널로그 신호처리 ASIC의 구현)

  • 김청월;이병렬;이상우;최준혁
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.4
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    • pp.65-73
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    • 2003
  • This paper presents the implementation of an analog signal-processing ASIS to detect an angular velocity signal from a vibrator angular velocity detection sensor. The output of the sensor to be charge appeared as the variation of the capacitance value in the structure of the sensor was detected using charge amplifiers and a self oscillation circuit for driving the sensor was implemented with a sinusoidal self oscillation circuit using the resonance characteristics of the sensor. Specially an automatic gain control circuit was utilized to prevent the deterioration of self-oscillation characteristics due to the external elements such as the characteristic variation of the sensor process and the temperature variation. The angular velocity signal, amplitude-mod)Hated in the operation characteristics of the sensor, was demodulated using a synchronous detection circuit. A switching multiplication circuit was used in the synchronous detection circuit to prevent the magnitude variation of detected signal caused by the amplitude variation of the carrier signal. The ASIC was designed and implemented using 0.5${\mu}{\textrm}{m}$ CMOS process. The chip size was 1.2mm x 1mm. In the experiment under the supply voltage of 3V, the ASIC consumed the supply current of 3.6mA and noise spectrum density from dc to 50Hz was in the range of -95 dBrms/√Hz and -100 dBrms/√Hz when the ASIC, coupled with the sensor, was in normal operation.

Estimation of Differently Exposed Low Dynamic Range Images from a Single Bayer Image (단일 Bayer 영상으로 부터 다양한 노출을 가지는 Low Dynamic Range 영상들의 추정)

  • Lee, Tae-Hyoung;Ha, Ho-Gun;Ha, Yeong-Ho
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.48 no.2
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    • pp.74-79
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    • 2011
  • HDR(high dynamic range) imaging techniques supports wider dynamic range than normal images captured from general still camera. These usually need several shots to obtain LDR(low dynamic range) images, causing ghosting artifacts. Accordingly, this paper suggests a method to generate new LDR images from a single Bayer image using Exposure LUT(look-up table) by considering channel dependency. We prior construct exposure LUT for each RGB channel, showing the relationship between input and average output luminance values. In the process, by applying the average luminance of input image and current exposure to LUT, new exposures which are determined by user choice are first estimated. Next, LDR images which are corresponded to new exposures are generated based on each LUT. Saturated areas are improved by considering channel dependency in the last procedure. In the experimental comparison, high PSNR values are obtained between estimated and captured images. Also, we have similar appearance on displayed images.

Prospects for Worldwide CBM(Coalbed Methane) Development (세계 석탄층메탄가스(CBM) 개발전망)

  • Kim, Young-In
    • Economic and Environmental Geology
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    • v.48 no.1
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    • pp.65-75
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    • 2015
  • The CBM(Coalbed Methane) development technology being developed in mid 1980s is the technology to produce the methane gas absorbed in the coal bed. CBM is easy to be developed and its coal deposit is abundant. Therefore, the CBM industry has a large potential as an energy source as well as to deal with the global regulations for reducing greenhouse gas emission. In order to produce coal, the CBM should first be developed as a preliminary action for mine security. So CBM is advantageous in reducing the global greenhouse gas as well as its advantage not being influenced by the changes in gas market. The ECBM (Enhanced Coalbed Methane) is a new technique producing the methane gas which is substituted and disorbed from coal by injecting $CO_2$ or $N_2$ gas into a coal bed. Especially, $CO_2$-ECMB is a low-carbon, green-growth technology, so can expect to the effect of green gas reduction as well as the improved productivity of methane gas. CBM technology is being developed in about 40 nations including Canada, Australia, China, India, Indonesia and Viet Nam, and the coal output using this technology is continually being increased. The CBM is expected to contribute in changing the energy source paradigm from current coal & petroleum energy to unconventional gas.

A Study on Statistical Parameters for the Evaluation of Regional Air Quality Modeling Results - Focused on Fine Dust Modeling - (지역규모 대기질 모델 결과 평가를 위한 통계 검증지표 활용 - 미세먼지 모델링을 중심으로 -)

  • Kim, Cheol-Hee;Lee, Sang-Hyun;Jang, Min;Chun, Sungnam;Kang, Suji;Ko, Kwang-Kun;Lee, Jong-Jae;Lee, Hyo-Jung
    • Journal of Environmental Impact Assessment
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    • v.29 no.4
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    • pp.272-285
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    • 2020
  • We investigated statistical evaluation parameters for 3D meteorological and air quality models and selected several quantitative indicator references, and summarized the reference values of the statistical parameters for domestic air quality modeling researcher. The finally selected 9 statistical parameters are MB (Mean Bias), ME (Mean Error), MNB (Mean Normalized Bias Error), MNE (Mean Absolute Gross Error), RMSE (Root Mean Square Error), IOA (Index of Agreement), R (Correlation Coefficient), FE (Fractional Error), FB (Fractional Bias), and the associated reference values are summarized. The results showed that MB and ME have been widely used in evaluating the meteorological model output, and NMB and NME are most frequently used for air quality model results. In addition, discussed are the presentation diagrams such as Soccer Plot, Taylor diagram, and Q-Q (Quantile-Quantile) diagram. The current results from our study is expected to be effectively used as the statistical evaluation parameters suitable for situation in Korea considering various characteristics such as including the mountainous surface areas.

Fabrication of Planar Multi-junction Thermal Converter (평면형 다중접합 열전변환기의 제작)

  • Kwon, Sung-Won;Park, S.I.;Cho, Y.M.;Kang, J.H.
    • Journal of Sensor Science and Technology
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    • v.5 no.4
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    • pp.17-24
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    • 1996
  • Planar multi-junction thermal converters were fabricated for precise measurements of the ac voltage and current by an ac-dc transfer method. A heater and a thermocouple array were fabricated onto a sandwiched membrane, $Si_{3}N_{4}$ (200 nm) / $SiO_{2}$ (400 nm) / $Si_{3}N_{4}$ (200 nm), a thickness of $0.8\;{\mu}m$ and a size of $2{\times}4\;mm^{2}$, which is supported by a surrounding frame. The NiCr heater is located at the center of the membrane vertically. Hot junctions of $48{\sim}156$ pairs of thermocouples (Cu-CuNi44) are located near or onto the heater, and cold junctions are located onto the silicon frame. Output of the thermal converters for 10 mA dc input was $76\;mV{\sim}382\;mV$ dependent on a model, and short term stability of the outputs was ${\pm}5{\sim}15\;ppm$/ 10 min with 5 mA dc input. Responsivity in air was in the range of $3.9{\sim}14.5V/W$. Responsivity of the model BF48 in air which has 48 thermocouples was 2 times or greater than that of 3 dimensional multi-junction thermal converter in vacuum which has 56 thermocouples. AC-DC transfer differences with an input of 10 mA or less were less than ${\pm}1\;ppm$ in the frequency range from 5 Hz to 2 kHz, and about $2{\sim}3\;ppm$ at 5 kHz and 10 kHz.

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A 3.2Gb/s Clock and Data Recovery Circuit without Reference Clock for Serial Data Communication (시리얼 데이터 통신을 위한 기준 클록이 없는 3.2Gb/s 클록 데이터 복원회로)

  • Kim, Kang-Jik;Jung, Ki-Sang;Cho, Seong-Ik
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.2
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    • pp.72-77
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    • 2009
  • In this paper, a 3.2Gb/s clock and data recovery (CDR) circuit for a high-speed serial data communication without the reference clock is described This CDR circuit consists of 5 parts as Phase and frequency detector(PD and FD), multi-phase Voltage Controlled-Oscillator(VCO), Charge-pumps (CP) and external Loop-Filter(KF). It is adapted the PD and FD, which incorporates a half-rate bang-bang type oversampling PD and a half-rate FD that can improve pull-in range. The VCO consists of four fully differential delay cells with rail-to-rail current bias scheme that can increase the tuning range and tuning linearity. Each delay cell has output buffers as a full-swing generator and a duty-cycle mismatch compensation. This materialized CDR can achieve wide pull-in range without an extra reference clock and it can be also reduced chip area and power consumption effectively because there is no additional Phase Locked- Loop(PLL) for generating reference clock. The CDR circuit was designed for fabrication using 0.18um 1P6M CMOS process and total chip area excepted LF is $1{\times}1mm^2$. The pk-pk jitter of recovered clock is 26ps at 3.2Gb/s input data rate and total power consumes 63mW from 1.8V supply voltage according to simulation results. According to test result, the pk-pk jitter of recovered clock is 55ps at the same input data-rate and the reliable range of input data-rate is about from 2.4Gb/s to 3.4Gb/s.

A Study on DC Changing Algorithm of the Line-Interactive UPS with Dual Converter Structure (2중 컨버터 구조를 갖는 계통 연계형 UPS의 DC 충전 알고리듬에 관한 연구)

  • Lee, Woo-Cheol;Yoo, Dong-Sang
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.3
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    • pp.27-34
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    • 2005
  • This paper presents a three phase Line-Interactive uninterruptible power supply(UPS) system with dual converter structure. The three phase UPS system consists of two active power compensator topologies. One is a series active compensator, which works as a voltage source in phase with the source voltage to have the sinusoidal source current and high power factor under the deviation and distortion of the source voltage. The other is a parallel active compensator, which works as a conventional sinusoidal voltage source in phase with the source voltage, providing to the load a regulated and sinusoidal voltage with low total harmonic distortion(THD). This paper presents in the series and parallel active compensator charging method depending on the amplitude of the source voltage. The conventional Line-Interactive UPS system is responsible for the DC charging and output voltage regulation at the same time, but UPS system with dual converter structure, a series active compensator can also charge the DC link. Therefore the charging algorithm using the series and parallel compensator needs to be researched. Therefore, by making the DC link voltage stable it can contribute the stability of series and parallel compensator. The simulation and experimental result are depicted in this paper to show the effect of the proposed algorithm.

Application and Development of 'Chestnut Management Standard Diagnostic Table' (밤나무 경영 표준진단표의 개발 및 적용)

  • Jeon, Jun-Heon;Yoo, Byoung-Il;Lee, Jung-Min;Ji, Dong-Hyun;Kim, Yeon-Tae;Kang, Kil-Nam
    • Journal of Korean Society of Forest Science
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    • v.101 no.4
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    • pp.695-702
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    • 2012
  • The chestnut management standard diagnostic table is developed and would be utilized in order that a manager raising chestnuts checks where the own level of management is and grasps current state of own for the purpose of planning aims and advancing toward a higher level. The developed 'Chestnut management standard diagnostic table' consisted of 3 first classified items, 19 second classified items and 2 product indicator items by the chestnut experts consultative meeting. A survey of 212 farmhouses in 4 major producing area was conducted. Except invalid survey of 53 farmers, 159 farmhouses interviewed were used in analysis. Total score was calculated with sum of each item's score. According to the survey results, average score is 68.0 and Buyeo received the highest score of 69.7 and Suncheon received the lowest score of 61.8 by regional groups. The higher the group in score, the better it is in output per hectare. But the property of 'the ratio of the best products in total products' does not show a statistical correlation. Generally the score of 'management-based evaluation indicator part' and 'management and sale capacity indicator part' in Suncheon was low because of many elderly people. In part of 'manufacturing technology indicator' as Environmentally-Friendly production is progressed in over 70% of four regions, when comes to a disease and insect pest control there are rarely farmhouses having a way of crop dusting.

A Comparative Analysis of Terminal Efficiency in Northeast Asia Container Ports (동북아시아 주요 컨테이너항만의 효율성 비교연구)

  • Li, Duo;Kwak, Kyu-Seok;Nam, Ki-Chan;An, Young-Mo
    • Journal of Navigation and Port Research
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    • v.39 no.1
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    • pp.55-60
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    • 2015
  • The purpose of this study is to suggest a major strategy to become effective for each port in Northeast Asia by analyzing the relative efficiency of each port to determine the current level of efficiency, efficient harbors plan. Individual port of the major 16 ports in Northeast Asia was analysed targeting efficiency and relative efficiency. In this study, DEA technique was used. Of the DEA model, CCR (constant returns to scale) models and BCC (variable return to scale) model was applied to analyze the efficiency and effectiveness of the port. Then the efficiency measured through CCR model is again compared with the efficiency measured by the BCC model. In this way, the empirical analysis includes the input factors of the operating ports such as the number of berths, wharf, depth, total area of the pier, C / C numbers and output elements includes the container throughput. The results of the study show that most of the ports in China is efficient whereas those in Korea and Japan are relatively inefficient. There are some pairs of ports which has the similar input factors, like Busan port and Shanghai port, Lianyungang port and Incheon port, Dalian port and Gwangyang port, but the container throughput of them has a huge difference.