• Journal of Adhesion and Interface
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• v.25 no.2
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• pp.43-49
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• 2024

In recent years, the flexible organic synaptic transistor (FOST) has garnered attention for its flexibility, biocompatibility, ease of processability, and reduced complexity, which arise from using organic semiconductors as channel layers. These transistors can emulate the plasticity of the human brain with a simpler structure and lower fabrication costs compared to conventional inorganic synaptic devices. This makes them suitable for applications in next-generation wearable devices and soft robotics technologies. In FOST, the organic substrate is sensitive to the device preparation temperature; high-temperature treatment processes can cause thermal deformation of the organic substrate. Therefore, low-temperature solution-based processing techniques are essential for fabricating high-performance devices. This review summarizes the current research status of low-temperature solution-based FOST devices and presents the problems and challenges that need to be addressed.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.341-341
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• 2012

Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.4
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• pp.315-320
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• 2020

Methylammonium lead iodide (MAPbI₃) thin films were grown at low temperatures on glass substrates via 3-zone chemical vapor deposition. Lead iodide (PbI₂) and lead bis (dipivaloylmethanate) [Pb(dpm)₂] precursors were used as lead sources. Due to the high sublimation temperature (~400℃) of the PbI₂ precursor, a low substrate temperature could not be constantly maintained. Therefore, MAPbI₃ thin films degraded into the PbI₂ phase. In contrast, for the Pb(dpm)₂ precursor, a substrate temperature of ~120℃ was maintained because the sublimation temperature of Pb(dpm)₂ is as low as 130℃ at a high vapor pressure. As a result, high-quality MAPbI₃ thin films were successfully grown on glass substrates using Pb(dpm)₂. The rms (root-mean-square) roughness of MAPbI₃ thin films formed from Pb(dpm)₂ was as low as ~19.2 nm, while it was ~22.7 nm for those formed using PbI₂. The grain size of the films formed from Pb(dpm)₂ was as large as approximately 350 nm.

• Korean Journal of Materials Research
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• v.12 no.8
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• pp.595-599
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• 2002

A homogeneous and stable, amorphous-type, anorthite (CaO $Al_2$$O_3$ $2SiO_2$)powder was synthesized by an organic-inorganic steric entrapment route. Polyvinyl alcohol ( PVA) was used as an organic carrier for the precursor ceramic gel. The PVA content, its degree of polymerization and type of silica sol had a significant influence on the calcination and crystallization behavior of the precursors. For densifiction and crystallization at low temperature, porous and soft, amorphous-type anorthite powder was planetary milled for 20h. The milled powder crystallized to stable anorthite phase and densified to a relative density of 94% below $1000^{\circ}C$. In the development of crystalline phases of the planetary milled powder, omisteinbergite phase was unusually observed at $900^{\circ}C$, and then anorthite was observed at $950^{\circ}C$. The sintered anorthite had a thermal expansion coefficient of $4.6$\times$10^{-6}$ /$^{\circ}C$ and a dielectric constant of 7.5 at 1 MHz. Finally, the anorthite synthesized by the new process is expected to be an useful material for low-firing ceramic substrate.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.12
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• pp.1106-1110
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• 2005

We fabricated (110) silicon hard master by using anisotropic wet etching for embossing. The etching chemical for the silicon wafer was a TMAH $25\%$ solution. The anisotropic wet etching produces a smooth sidewall surface and the surface roughness of the fabricated master is about 3 nm. After spin coating an organic-inorganic sol-gel hybrid material on a silicon substrate, we employed hot embossing technique operated at a low pressure and temperature to form patterns on the silicon substrate by using the fabricated master. We successfully fabricated the multi-mode planar optical waveguides showing low propagation loss of 0.4 dB/cm. The surface roughness of embossed patterns was uniform for more than 10 times of the embossing processes with a single hydrophobic surface treatment of the silicon hard master.

• Microbiology and Biotechnology Letters
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• v.31 no.2
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• pp.171-176
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• 2003

Productivity of biosurfactant (rhamnolipid) by Pseudomonas aeuginosa F722 was investigated in the several culture conditions and culture composition. Biosurfactant production by P. aeuginosa F722 was amounted to 0.78 g/l as the result of the nitrogen sources and carbon sources without investing of optimum conditions. As for that one was investigated, biosurfactant production by P. aeruginosa F722 was amounted to 1.66 g/l. Biosurfactant production increased twofold because the composition of a modified C-medium was investigated efficiently. $NE_4$Cl or $NaNO_2$ inorganic nitrogens and yeast extract or trypton organic nitrogens were effective, but others inorganic nitrogens and organic nitrogens tested were not efficient far biosurfactant production by P. aeruginosa F722. The optimum concentration of $NH_4$Cl; inorganic nitrogen and yeast extract; organic nitrogen were 0.05% and 0.1%, respectively. In various carbon sources, others with the exception of hydrophobic property substrate (n-alkane) and hydrophilic property substrate (glucose, glycol) were not found to be effective fur biosurfactant production, and 3.0% was better in yield than other concentration of glucose. This yielded C-to-N ratios between 17 and 20. In our experiment, the highest biosurfactant production by P. aeruginosa F722 were observed in 5 days cultivation, containing glucose 3.0%, $NH_4$Cl 0.05%, and yeast extract 0.1% and C-to-N ratio was 20. Optimal pH and temperature for biosurfactant production were 7.0 and $35^{\circ}C$, respectively. Under the optimal culture conditions with glucose, biosurfactant production was amounted to 1.66 g/l. Velocity of biosurfactant production and strain growth increased after nitrogen depletion. The average surface tension of 30 mN/m after the 3 days of incubation under optimal culture condition was measured by ring tensionmeter.

• Journal of the Korean Ceramic Society
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• v.42 no.10 s.281
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• pp.645-648
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• 2005

To fabricate a (100) silicon hard master, we used anisotropic wet etching for the embossing. The etching chemical for the sili­con wafer was a TMAH 25$\%$ solution. The anisotropic wet etching produces a smooth sidewall surface inclined at 54.7°, and the surface roughness of the fabricated master is about 1 nm. After spin coating an organic-inorganic sol-gel hybrid resin on a silicon substrate, we used the fabricated master to form patterns on the silicon substrate. Thus, we successfully obtained patterns via the hot embossing technique with the (100) silicon hard master. Moreover, by using a single hydrophobic surface treatment of the master, we succeeded in achieving uniform surface roughness of the embossed patterns for more than ten embossments.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.1.1-1.1
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• 2011

Printed electronics based on the direct writing of solution processable functional materials have been of paramount interest and importance. In this talk, the synthesis of printable inorganic functional materials (conductors and semiconductors) for thin-film transistors (TFTs) and photovoltaic devices, device fabrication based on a printing technique, and specific characteristics of devices are presented. For printable conductor materials, Ag ink is designed to achieve the long-term dispersion stability and good adhesion property on a glass substrate, and Cu ink is sophisticatedly formulated to endow the oxidation stability in air and even aqueous solvent system. The both inks were successfully printed onto either polymer or glass substrate, exhibiting the superior conductivity comparable to that of bulk one. In addition, the organic thin-film transistor based on the printed metal source/drain electrode exhibits the electrical performance comparable to that of a transistor based on a vacuum deposited Au electrode. For printable amorphous oxide semiconductors (AOSs), I introduce the noble ways to resolve the critical problems, a high processing temperature above $400^{\circ}C$ and low mobility of AOSs annealed at a low temperature below $400^{\circ}C$. The dependency of TFT performances on the chemical structure of AOSs is compared and contrasted to clarify which factor should be considered to realize the low temperature annealed, high performance AOSs. For photovoltaic application, CI(G)S nanoparticle ink for solution processable high performance solar cells is presented. By overcoming the critical drawbacks of conventional solution processed CI(G)S absorber layers, the device quality dense CI(G)S layer is obtained, affording 7.3% efficiency CI(G)S photovoltaic device.

• Journal of the Semiconductor & Display Technology
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• v.22 no.3
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• pp.101-105
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• 2023

Organic photo Diodes (OPDi) give multiple advantages in the growing interest of the flexible optoelectronic devices. Organic semiconductors are freeform as they can deposit on any substrate, so it could be flexible. But the inorganic material photodiodes (PDs) are usually fabricated on silicon wafers which are solid. So, normally PDs are inflexible. By those reasons, we decided to make the vacuum deposited small molecule OPDi. We have investigated the OPDi's J-V characteristic by changing the thickness of p-type layer of OPDi. This device consists of indium-tin-oxide (ITO) / 2,3:6,7-dibenzanthracene (pentacene) / buckminsterfullerene (C60) / aluminum (Al). Its J-V characteristics were measured in the probe station(4156C) that can give dark condition while measuring. And for the luminance characteristics, the photocurrent was measured with the bright halogen lamp and a probe station.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.717-720
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• 2007

We fabricated the 3.5 inch QCIF AMOLED panel with ultra low temperature polycrystalline silicon TFT on the plastic substrate. To reduce the leakage current, we used the triple layered gate metal structure. To reduce the stress from inorganic dielectric layer, we applied the organic interlayer dielectric and the photoactive insulating layer. By using the interlayer dielectric as a capacitor, the mask steps are reduced up to five.