• Communications of the Korean Institute of Information Scientists and Engineers
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• v.27 no.5
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• pp.47-57
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• 2009

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.5
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• pp.537-541
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• 2008

Log-Structured File System(LFS) is a disk based file system that is optimized for improving the write performance. LFS gathers dirty data in memory as long as possible, and flushes all dirty data sequentially at once. In a real system, however, maintaining dirty data in memory should be flushed into a disk to meet file system consistency issues even if more memory is still available. This synchronizations increase the cleaner overhead of LFS and make LFS to write down more metadata into a disk. In this paper, by adapting Non-volatile RAM(NV-RAM) we modifies LFS and virtual memory subsystem to guarantee that LFS could gather enough dirty data in the memory and reduce small disk writes. By doing so, we improves the performance of LFS by around 2.5 times than the original LFS.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.7-8
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• 2008

The memory characteristics of charge trap flash (CTF) with $HfO_2$ charge trap layer were investigated. Especially, we focused on the effects of tunnel barrier engineering consisted of $SiO_2/Si_3N_4/SiO_2$ (ONO) stack or $Si_3N_4/SiO_2/Si_3N_4$ (NON) stack. The programming and erasing characteristics were significantly enhanced by using ONO or NON tunnel barrier. These improvement are due to the increase of tunneling current by using engineered tunnel barrier. As a result, the engineered tunnel barrier is a promising technique for non-volatile flash memory applications.

• The Journal of the Korea institute of electronic communication sciences
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• v.4 no.4
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• pp.301-305
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• 2009

Pt nanoparticles with a narrow size distribution (dia. ~4 nm) were synthesized via an alcohol reduction method and used for the fabrication of hybrid Pt-$SiO_2$ nanoparticles. Also, the self-assembled monolayer of Pt nanoparticles (NPs) was studied as a charge trapping layer for non-volatile memory (NVM) applications. A metal-oxide-semiconductor (MOS) type memory device with Pt NPs exhibits a relatively large memory window. These results indicate that the self-assembled Pt NPs can be utilized for NVM devices. In addition, it was tried to show the control of thin-film thickness of hybrid Pt-$SiO_2$ nanoparticles indicating the possibility of much applications for the MOS type memory devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.358-358
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• 2010

To improve the programming/erasing speed and leakage current of multiple dielectric stack tunnel barrier engineering (TBE) Non-volatile memory, We propose a new concept called staggered structure of TBE memory. In this study, We fabricated staggered structure capacitor on $Si_3N_4$ stacked HfAlO and measured C-V curve that can observe tunneling characteristic of this device as various annealing temperature compared with that of single layer $SiO_2$ capacitor.

• Proceedings of the Korean Society of Computer Information Conference
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• 2016.01a
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• pp.5-7
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• 2016

본 논문에서는 블록 생성 번호를 활용한 동적 마모도 평준화 기법을 제안한다. 지금까지 제안된 동적 마모도 평준화 기법들은 콜드 블록을 판별하기 위해 경과 시간을 사용하고 있다. 하지만 저장장치의 데이터 접근은 일정한 시간 간격으로 이루어지는 것이 아니기 때문에 이와 같은 경과 시간을 사용하는 방식은 데이터에 대한 블록 접근 정보가 왜곡될 수 있는 단점이 있다. 이러한 단점을 해결하기 위해, 본 논문에서 제안하는 기법은 블록을 할당할 때 블록 순차 번호를 테이블에 저장하고 이를 이용하여 블록의 접근 빈도를 판별한다. 실험에서 제한하는 기법은 기존의 CB, CAT 기법과 비교하여 최대 11% 수명이 향상됨을 확인하였다.

• Transactions on Electrical and Electronic Materials
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• v.12 no.1
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• pp.16-19
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• 2011

The oxide-nitride-oxide (ONO) deposition process was added to the beginning of a 0.25 ${\mu}m$ embedded polysiliconoxide-nitride-oxide-silicon (SONOS) process before all of the logic well implantation processes in order to maintain the characteristics of basic CMOS(complementary metal-oxide semiconductor) logic technology. The system subsequently suffered severe ONO rupture failure. The damage was caused by the ONO implantation and was responsible for the ONO rupture failure in the embedded SONOS process. Furthermore, based on the experimental results as well as an implanted ion's energy loss model, processes primarily producing permanent displacement damages responsible for the ONO rupture failure were investigated for the embedded SONOS process.

• Journal of KIISE
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• v.42 no.1
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• pp.107-113
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• 2015

In a database system, updates on pages that are made by a transaction should be stored in a secondary storage before the commit is complete. Generic secondary storages have volatile DRAM caches to hide long latency for non-volatile media. However, as logs that are only written to the volatile DRAM cache don't ensure durability, logging latency cannot be hidden. Recently, a flash SSD with capacitor-backed DRAM cache was developed to overcome the shortcoming. Storage devices, like those with a non-volatile cache, will increase transaction throughput because transactions can commit as soon as the logs reach the cache. In this paper, we analyzed performance in terms of transaction throughput when the SSD with capacitor-backed DRAM cache was used as log storage. The transaction throughput can be improved over three times, by committing right after storing the logs to the DRAM cache, rather than to a secondary storage device. Also, we showed that it could acquire over 73% of the ideal logging performance with proper tuning.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.39.1-39
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• 1998

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.415-416
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• 2009

The tunnel barrier engineered charge trap flash (TBE-CTF) non-volatile memory using CRESTED tunneling barrier was fabricated by stacking thin $Si_3N_4$ and $SiO_2$ dielectric layers. Moreover, high-k based $HfO_2$ charge trap layer and $Al_2O_3$ blocking layer were used for further improvement of the NVM (non-volatile memory) performances. The programming/erasing speed, endurance and data retention of TBE-CTF memory was evaluated.