• Korean Journal of Materials Research
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• v.16 no.10
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• pp.656-662
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• 2006

We fabricated thermal evaporated 10 nm-$Ni_xCo_{1-x}$ (x=0.2, 0.5 and 0.8) /(poly)Si films to form nanothick cobalt nickel composite silicides by a rapid thermal annealing at $700{\sim}1100^{\circ}C$ for 40 seconds. A field emission scanning electron microscope and a micro-Raman spectrometer were employed for microstructure and silicon residual stress characterization, respectively. We observed self-aligned micro-pinholes on single crystal silicon substrates silicidized at $1100^{\circ}C$. Raman silicon peak shift indicates that the residual tensile strain of $10^{-3}$ in single crystal silicon substrates existed after the silicide process. We propose thermal stress from silicide exothermic reaction and high temperature silicidation annealing may cause the pinholes. Those pinholes are expected to be avoided by lowering the silicidation temperature. Our results imply that we may use our newly proposed composite silicides to induce the appropriate strained layer in silicion substrates.

• Korean Journal of Materials Research
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• v.14 no.12
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• pp.846-850
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• 2004

NiCo silicide films have been fabricated from $300{\AA}-thick\;Ni_{1-x}Co_{x}(x=0.1\sim0.9)$ on Si-substrates by varying RTA(rapid thermal annealing) temperatures from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 sec. Sheet resistance, cross-sectional microstructure, and chemical composition evolution were measured by a four point probe, a transmission electron microscope(TEM), and an Auger depth profilemeter, respectively. For silicides of the all composition and temperatures except for $80\%$ of the Ni composition, we observed small sheet resistance of sub- $7\;{\Omega}/sq.,$ which was stable even at $1100^{\circ}C$. We report that our newly proposed NiCo silicides may obtain sub 50 nm-thick films by tunning the nickel composition and silicidation temperature. New NiCo silicides from NiCo-alloys may be more appropriate for sub-0.1${\mu}m$ CMOS process, compared to conventional single phase or stacked composit silicides.

• Journal of the Korean institute of surface engineering
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• v.38 no.1
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• pp.44-48
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• 2005

We prepared nickel silicide layers from p-Si(l00)/SiO₂(2000 Å)/poly-Si(700 Å)/Ni(400 Å) structures, feasible for gates in MOSFETs, by annealing them from 500℃～900℃ for 30 minutes. We measured the color coordination in visible range, cross sectional micro-structure, and surface topology with annealing temperature by an UV-VIS-IR spectrometer, field effect scanning electron microscope(FE-SEM), and scanning probe micro-scope respectively. We conclude that we may identify the nickel silicide by color difference of 0.90 and predict the silicide process reliability by color coordination measurement. The nickel silicide layers showed similar thickness while the columnar grains size and surface roughness increased as annealing temperature increased.

• Journal of Powder Materials
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• v.6 no.2
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• pp.145-151
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• 1999

Nickel silicides ($Ni_5$Si$_2$, Ni$_2$Si and NiSi) have been synthesized by mechanical alloying (MA) of Ni-27.9at.9at%Si, Ni-33.3at% and Ni-50.0at% powder mixtures, respectively. From in situ thermal analysis, eash citical milling period for the formation of the three phases was observed to be 40.2, 34.9 and 57.5 min, at which there was a rapid increase in temperature. This indicates that rapid, self-propagating high-temperature synthesis (SHS) reactions were observed to produce the three phases during room-temperature high-energy ball milling of elemental powders. Each Ni silicide, Ni and Si, however, coexisted for an extended milling time even after the critical milling period. The powders mechanically alloyed after the critical period showed the rapid increase in microhardness. The Hv values were found to be higher than 1000kgf/mm$^2$. The formation of nickel silicides by mechanical alloying and the relevant reaction rates appeared to be influenced by the critical milling period and the heat of formation of the products involved ($Ni_5$Si$_2$$\rightarrow$-43.1kJ/mol.at., Ni$_2$Si$\rightarrow$-47.6kJ/mol.at., NiSi$\rightarrow$-42.4kJ/mol.at).

• Proceedings of the Materials Research Society of Korea Conference
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• 2005.05a
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• pp.236-236
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• 2005

• Proceedings of the Materials Research Society of Korea Conference
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• 2000.11a
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• pp.97-97
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• 2000

• Korean Journal of Materials Research
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• v.14 no.6
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• pp.389-393
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• 2004

The silicide layer used as a diffusion barrier in microelectronics is typically required to be below 50 nm-thick and, the same time, the silicides also need to have low contact resistance without agglomeration at high processing temperatures. We fabricated Si(100)/15 nm-Ni/15 nm-Co samples with a thermal evaporator, and annealed the samples for 40 seconds at temperatures ranging from $700^{\circ}C$ to $1100^{\circ}C$ using rapid thermal annealing. We investigated microstructural and compositional changes during annealing using transmission electron microscopy and auger electron spectroscopy. Sheet resistance of the annealed sample stack was measured with a four point probe. The sheet resistance measurements for our proposed Co/Ni composite silicide was below 8 $\Omega$/sq. even after annealing $1100^{\circ}C$, while conventional nickel-monosilicide showed abrupt phase transformation at $700^{\circ}C$. Microstructure and auger depth profiling showed that the silicides in our sample consisted of intermixed phases of $CoNiSi_{x}$ and NiSi. It was noticed that NiSi grew rapidly at the silicon interface with increasing annealing temperature without transforming into $NiSi_2$. Our results imply that Co/Ni composite silicide should have excellent high temperature stability even in post-silicidation processes.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.22.2-22.2
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• 2009

Currently, metal silicides become increasingly more essential part as a contact material in complimentary metal-oxide-semiconductor (CMOS). Among various silicides, NiSi has several advantages such as low resistivity against narrow line width and low Si consumption. Generally, metal silicides are formed through physical vapor deposition (PVD) of metal film, followed by annealing. Nanoscale devices require formation of contact in the inside of deep contact holes, especially for memory device. However, PVD may suffer from poor conformality in deep contact holes. Therefore, Atomic layer deposition (ALD) can be a promising method since it can produce thin films with excellent conformality and atomic scale thickness controllability through the self-saturated surface reaction. In this study, Ni thin films were deposited by thermal ALD using bis(dimethylamino-2-methyl-2-butoxo)nickel [Ni(dmamb)2] as a precursor and NH3 gas as a reactant. The Ni ALD produced pure metallic Ni films with low resistivity of 25 $\mu{\Omega}cm$. In addition, it showed the excellent conformality in nanoscale contact holes as well as on Si nanowires. Meanwhile, the Ni ALD was applied to area-selective ALD using octadecyltrichlorosilane (OTS) self-assembled monolayer as a blocking layer. Due to the differences of the nucleation on OTS modified surfaces toward ALD reaction, ALD Ni films were selectively deposited on un-coated OTS region, producing 3 ${\mu}m$-width Ni line patterns without expensive patterning process.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.2
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• pp.195-200
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• 2007

We fabricated thermally-evaporated 10 nm-Ni/70 w-Poly-Si/200 $nm-SiO_2/Si$ and $10nm-Ni_{0.5}Co_{0.5}/70$ nm-Poly-Si/200 $nm-SiO_2/Si$ structures to investigate the microstructure of nickel monosilicide at the elevated temperatures required fur annealing. Silicides underwent rapid anneal at the temperatures of $600{\sim}1100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process formed on top of the polycrystalline silicon substrate mimicking the gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope and an Auger depth profile scope were employed for the determination of cross sectional microstructure and thickness. 20nm thick nickel cobalt composite silicides on polycrystalline silicon showed low resistance up to $900^{\circ}C$, while the conventional nickle silicide showed low resistance below $900^{\circ}C$. Through TEM analysis, we confirmed that the 70nm-thick nickel cobalt composite silicide showed a unique silicon-silicide mixing at the high silicidation temperature of $1000^{\circ}C$. We identified $Ni_3Si_2,\;CoSi_2$ phase at $700^{\circ}C$ using an X-ray diffractometer. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo composite silicide from NiCo alloy films process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.4
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• pp.27-36
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• 2006

We fabricated thermally evaporated 10 nm-Ni/(poly)Si, 10 nm-Ni/l nm-Ir/(poly)Si and 10 nm-Ni/l nm-Pt/(poly)Si films to investigate the thermal stability of nickel monosilicides at the elevated temperatures by rapid annealing them at the temperatures of $300{\sim}1200^{\circ}C$ for 40 seconds. Silicides of 50 nm-thick were formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to examine sheet resistance. A scanning electron microscope and field ion beam were employed for thickness and microstructure evolution characterization. An X-ray diffractometer and an Auger depth profiler were used for phase and composition analysis, respectively. Nickel silicides with platinum have no effect on widening the NiSi stabilization temperature region. Nickel silicides with iridium farmed on single crystal silicon showed a low resistance up to $1200^{\circ}C$ while the ones formed on polycrystalline silicon substrate showed low resistance up to $850^{\circ}C$. The grain boundary diffusion and agglomeration of silicides lowered the NiSi stable temperature with polycrystalline silicon substrates. Our result implies that our newly proposed Ir added NiSi process may widen the thermal process window for nano CMOS process.