• Korean Journal of Metals and Materials
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• v.47 no.5
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• pp.322-329
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• 2009

60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.166-171
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• 2016

Nickel silicide is main issue in Polycrystalline silicon Thin Film Transistor (TFT) which is made by Metal Induced Lateral Crystallization (MILC) method. This Nickel silicide acts as a defect center, and this defect is one of the biggest reason of the high leakage current. In this research, we fabricated polycrystalline TFTs with novel method called Edge Cut (EC). With this new fabrication method, we assumed that nickel silicide at the edge of the channel region is reduced. Electrical properties are measured and trap state density also calculated using Levinson & Proano method.

• Korean Journal of Metals and Materials
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• v.46 no.11
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• pp.762-769
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• 2008

Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

• Korean Journal of Materials Research
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• v.17 no.6
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• pp.323-330
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• 2007

We fabricated thermaly evaporated 10 nmNi/(poly)Si films to investigate the energy saving property of silicides formed by rapid thermal annealing (RTA) at the temperature of $300{\sim}1200^{\circ}C$ for 40 seconds. Moreover, we fabricated $10{\sim}50$ nm-thick ITO/Si films with a rf-sputter as reference films. A four-point tester was used to investigate the sheet resistance. A transmission electron microscope (TEM) and an X-ray diffractometer were used for the determination of cross sectional microstructure and phase changes. A UV-VISNIR and FT-IR (Fourier transform infrared rays spectroscopy) were employed for near-IR and middle-IR absorbance. Through TEM analysis, we confirmed $20{\sim}70nm-thick$ silicide layers formed on the single and polycrystalline silicon substrates. Nickel silicides and ITO films on the single silicon substrates showed almost similar absorbance in near-IR region, while nickel silicides on polycrystalline silicon substrate showed superior absorbance above 850 nm near-IR region to ITO films. Nickel silicide on polycrystalline substrate also showed better absorbance in middle IR region than ITO. Our result implies that nano-thick nickel silicides may have exellent absorbing capacity in near-IR and middle-IR region.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.4
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• pp.308-317
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• 2007

We fabricated thermally-evaporated 10 nm-Ni/(poly)Si and 10 nm-$Ni_{0.5}Co_{0.5}$/(Poly)Si structures to investigate the microstructure of nickel silicides at the elevated temperatures required lot annealing. Silicides underwent rapid annealing at the temperatures of $600{\sim}1100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope and an Auger depth profilescope were employed for the determination of vortical microstructure and thickness. Nickel silicides with cobalt on single crystal silicon actives and polycrystalline silicon gates showed low resistance up to $1100^{\circ}C$ and $900^{\circ}C$, respectively, while the conventional nickle monosilicide showed low resistance below $700^{\circ}C$. Through TEM analysis, we confirmed that a uniform, $10{\sim}15 nm$-thick silicide layer formed on the single-crystal silicon substrate for the Co-alloyed case while a non-uniform, agglomerated layer was observed for the conventional nickel silicide. On the polycrystalline silicon substrate, we confirmed that the conventional nickel silicide showed a unique silicon-silicide mixing at the high silicidation temperature of $1000^{\circ}C$. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo-alloy composite silicide process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.15-16
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• 2006

The thermal stability of nickel silicide with compressively and tensilely stressed nitride capping layer has been investigated in this study. The Ni (10 nm) and Ni/Co/TiN (7/3/25 nm) structures were deposited on the p-type Si substrate. The stressed capping layer was deposited using plasma enhanced chemical vapor deposition (PECVD) after silicide formation by one-step rapid thermal process (RTP) at $500^{\circ}C$ for 30 sec. It was found that the thermal stability of nickel silicide depends on the stress induced by the nitride capping layer. In the case of Ni (10 nm) structure, the high compressive sample shows the best thermal stability, whereas in the case of Ni/Co/TiN (7/3/25 nm) structure, the high compressive sample shows the worst thermal stability.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.1
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• pp.22-27
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• 2013

Detailed study on how the plasma process during the sidewall spacer formation suppresses the formation of silicide is done. In non-patterned wafer test, it is found that both fluorocarbon reactive ion etch (RIE) and TEOS plasma-enhanced deposition processes modify the Si surface so that the silicide reaction is chemically inhibited or suppressed. In order to investigate the cause of the chemical modification, we analyze the elements on the silicon surface through Auger Electron Spectroscopy (AES). From the AES result, it is found that the carbon induces chemical modification which blocks the reaction between silicon and nickel. Thus, protecting the surface from the carbon-containing plasma process prior to nickel deposition appears critical in successful silicide formation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.260-260
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• 2009

In high-efficiency crystalline silicon solar cell, If high-efficiency solar cells are to be commercialized, It is need to develop superior contact formation method and material that can be inexpensive and simple without degradation of the solar cells ability. For reason of plated metallic contact is not only high metallic purity but also inexpensive manufacture. It is available to apply mass production. Especially, Nickel, Copper are applied widely in various electronic manufactures as easily formation is available by plating. Ni is shown to be a suitable barrier to Cu diffusin as well as desirable contact metal to silicon. Nickel monosilicide has been suggested as a suitable silicide due to its lower resistivitym lower sintering temperature and lower layer stress than $TiSi_2$. In this paper, Nickel as a seed layer and diffusion barrier is plated by electroless plating to make nickel monosilicide.

• Korean Journal of Materials Research
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• v.19 no.4
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• pp.179-185
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• 2009

We fabricated thermally evaporated 30 nm-Ni/(20 nm or 60 nm)a-Si:H/Si films to investigate the energy-saving property of silicides formed by rapid thermal annealing (RTA) at temperatures of $350^{\circ}C$, $450^{\circ}C$, $550^{\circ}C$, and $600^{\circ}C$ for 40 seconds. A transmission electron microscope (TEM) and a high resolution X-ray diffractometer (HRXRD) were used to determine the cross-sectional microstructure and phase changes. A UVVIS-NIR and FT-IR (Fourier transform infrared spectroscopy) were employed for near-IR and middle-IR absorbance. Through TEM and HRXRD analysis, for the nickel silicide formed at low temperatures below $450^{\circ}C$, we confirmed columnar-shaped structures with thicknesses of $20{\sim}30\;nm$ that had ${\delta}-Ni^2Si$ phases. Regarding the nickel silicide formed at high temperatures above $550^{\circ}C$, we confirmed that the nickel silicide had more than 50 nm-thick columnar-shaped structures with a $Ni_{31}Si_{12}$ phase. Through UV-VIS-NIR analysis, nickel silicide showed almost the same absorbance in the near IR region as well as ITO. However, in the middle IR region, the nickel silicides with low temperature showed similar absorbance to those from high temperature silicidation.

• Korean Journal of Metals and Materials
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• v.46 no.2
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• pp.69-79
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• 2008

A composition consisting of 10 nm-Ni/1 nm-Pd/(30 nm or 70 nm-poly)Si was thermally annealed using rapid thermal for 40 seconds at $300{\sim}1100^{\circ}C$ to improve the thermal stability of conventional nickel monosilicide. The annealed bilayer structure developed into $Ni(Pd)Si_x$, and the resulting changes in sheet resistance, microstructure, phase, chemical composition, and surface roughness were investigated. The silicide, which formed on single crystal silicon, could defer the transformation of $NiSi_2$, and was stable at temperatures up to $1100^{\circ}C$. It remained unchanged on polysilicon substrate compared with the sheet resistance of conventional nickel silicide. The silicides annealed at $700^{\circ}C$, formed on single crystal silicon and 30 nm polysilicon substrates exhibited 30 nm-thick uniform silicide layers. However, silicide annealed at $1,000^{\circ}C$ showed preferred and agglomerated phase. The high resistance was due to the agglomerated and mixed microstructures. Through X-ray diffraction analysis, the silicide formed on single crystal silicon and 30 nm polysilicon substrate, showed NiSi phase on the entire temperature range and mixed phases of NiSi and $NiSi_2$ on 70 nm polysilicon substrate. Through scanning probe microscope (SPM) analysis, we confirmed that the surface roughness increased abruptly until 36 nm on 30 nm polysilicon substrate while not changed on single crystal and 70 nm polysilicon substrates. The Pd-inserted nickel monosilicide could maintain low resistance in a wide temperature range and is considered suitable for nano-thick silicide processing.