• Title/Summary/Keyword: Neuron chip

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An Integrated Approach of CNT Front-end Amplifier towards Spikes Monitoring for Neuro-prosthetic Diagnosis

  • Kumar, Sandeep;Kim, Byeong-Soo;Song, Hanjung
    • BioChip Journal
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    • v.12 no.4
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    • pp.332-339
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    • 2018
  • The future neuro-prosthetic devices would be required spikes data monitoring through sub-nanoscale transistors that enables to neuroscientists and clinicals for scalable, wireless and implantable applications. This research investigates the spikes monitoring through integrated CNT front-end amplifier for neuro-prosthetic diagnosis. The proposed carbon nanotube-based architecture consists of front-end amplifier (FEA), integrate fire neuron and pseudo resistor technique that observed high electrical performance through neural activity. A pseudo resistor technique ensures large input impedance for integrated FEA by compensating the input leakage current. While carbon nanotube based FEA provides low-voltage operation with directly impacts on the power consumption and also give detector size that demonstrates fidelity of the neural signals. The observed neural activity shows amplitude of spiking in terms of action potential up to $80{\mu}V$ while local field potentials up to 40 mV by using proposed architecture. This fully integrated architecture is implemented in Analog cadence virtuoso using design kit of CNT process. The fabricated chip consumes less power consumption of $2{\mu}W$ under the supply voltage of 0.7 V. The experimental and simulated results of the integrated FEA achieves $60G{\Omega}$ of input impedance and input referred noise of $8.5nv/{\sqrt{Hz}}$ over the wide bandwidth. Moreover, measured gain of the amplifier achieves 75 dB midband from range of 1 KHz to 35 KHz. The proposed research provides refreshing neural recording data through nanotube integrated circuit and which could be beneficial for the next generation neuroscientists.

A Novel Multi-Quantum Well Injection Mode Diode And Its Application for the Implementation of Pulse-Mode Neural Circuits (다중 양자우물 주사형 다이오드와 펄스-모드 신경회로망 구현을 위한 그 응용)

  • Song Chung Kun
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.8
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    • pp.62-71
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    • 1994
  • A novel semiconductor device is proposed to be used as a processing element for the implementation of pulse-mode neural networks which consists of alternating n' GaAs quantum wells and undoped AlGaAs barriers sandwitched between n' GaAs cathode and P' GaAs anode and in simple circuit in conjunction with a parallel capacitive and resistive load the trigger circuit generates neuron-like pulse train output mimicking the function of axon hillock of biological neuron. It showed the sigmoidal relationship between the frequency of the pulse-train and the applied input DC voltage. In conjunction with MQWIMD the various neural circuits are proposed especially a neural chip monolithically integrated with photodetectors in order to perfrom the pattern recognition.

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A Backpropagation Learning Algorithm for pRAM Networks (pRAM회로망을 위한 역전파 학습 알고리즘)

  • 완재희;채수익
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.1
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    • pp.107-114
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    • 1994
  • Hardware implementation of the on-chip learning artificial neural networks is important for real-time processing. A pRAM model is based on probabilistic firing of a biological neuron and can be implemented in the VLSI circuit with learning capability. We derive a backpropagation learning algorithm for the pRAM networks and present its circuit implementation with stochastic computation. The simulation results confirm the good convergence of the learning algorithm for the pRAM networks.

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Implementation of Banyan Network Controller by Using Neural Networks (신경망을 이용한 Banyan 네트워크 컨트롤러의 하드웨어 구현)

  • 윤인철;정덕진
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.43 no.5
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    • pp.861-865
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    • 1994
  • By using Neural Networks, a 8$\times$8 Banyan network controller is designed and implemented. In order to solve internal blocking and output blocking, Winner-Take-All method is used. The longer queue takes higher priority. First-in-first-out method is used among the non-blocking cells in the queue selected.The required time to select a cell is 2.7 $\mu$sec for 155Mbps. The implemented controller using Xilinx FPGA chip selects cells within 2.5$\mu$sec.

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Control and Development of LonWorks Intelligent Control Module for Water Treatment Facility Based Networked control System

  • Hong, Won-Pyo;Kim, Dong-Hwa
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1757-1762
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    • 2003
  • With distribution industrial control system, the use of low cost to achieve a highly reliable and safe system in real time distributed embedded application is proposed. This developed intelligent node is based on two microcontrollers, one for the execution of the application code, also as master controller for ensuring the real time control & the logic operation with PLD and other for communication task and the easy control execution, i.e., I/O digital input, digital output and interrupting. This paper also presents where the case NCS (Networked control system) with LonTalk protocol is applied for the filtration process control system of a small water treatment plant.

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The Development of IDMLP Neural Network for the Chip Implementation and it's Application to Speech Recognition (Chip 구현을 위한 IDMLP 신경 회로망의 개발과 음성인식에 대한 응용)

  • 김신진;박정운;정호선
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.28B no.5
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    • pp.394-403
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    • 1991
  • This paper described the development of input driven multilayer perceptron(IDMLP) neural network and it's application to the Korean spoken digit recognition. The IDMPLP neural network used here and the learning algorithm for this network was proposed newly. In this model, weight value is integer and transfer function in the neuron is hard limit function. According to the result of the network learning for the some kinds of input data, the number of network layers is one or more by the difficulties of classifying the inputs. We tested the recognition of binaried data for the spoken digit 0 to 9 by means of the proposed network. The experimental results are 100% and 96% for the learning data and test data, respectively.

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Application Technology Development of Lon Works Fieldbus Network System for Distributed Control System Based Water Treatment Facility

  • Hong, Won-Pyo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2004.05a
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    • pp.404-411
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    • 2004
  • With distribution industrial control system, the use of low cost to achieve a highly reliable and safe system in real time distributed embedded application is proposed. This developed intelligent node is based on two microcontrollers, one for the execution of the application code, also as master controller for ensuring the real time control & the logic operation with CPLD and other for communication task and the easy control execution, i.e., I/O digital input, digital output and interrupting. This paper also presents where the case NCS (Networked control system) with LonTalk protocol is applied for the filtration process control system of a small water treatment plant.

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Development of Intelligent Control Module with ANSI/EIA 709.1 for Water Treatment Facility

  • Hong, Won-Pyo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2003.11a
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    • pp.243-249
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    • 2003
  • With distribution industrial control system, the use of tow cost to achieve a highly reliable and safe system in real time distributed embedded application is proposed. This developed intelligent node is based on two microcontrollers, one for the execution of the application code, also as master controller for ensuring the real time control & the logic operation with PLD and other for communication task and the easy control execution, i.e., I/O digital input, digital output and interrupting. This paper also presents where the case NCS(Networked control system) with LonTalk protocol is applied for the filtration process control system of a small water treatment plant.

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Design of 8bit current steering DAC for stimulating neuron signal (뉴런 신호 자극을 위한 8비트 전류 구동형 DAC)

  • Park, J.H.;Shi, D.;Yoon, K.S.
    • Journal of rehabilitation welfare engineering & assistive technology
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    • v.7 no.2
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    • pp.13-18
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    • 2013
  • In this paper design a 8 bit Current Steering D/A Converter for stimulating neuron signal. Proposed circuit in paper shows the conversion rate of 10KS/s and the power supply of 3.3V with 0.35um Magna chip CMOS process using full custom layout design. It employes segmented structure which consists of 3bit thermometer decoders and 5bit binary decoder for decreasing glitch noise and increasing resolution. So glitch energy is down by $10nV{\bullet}sec$ rather than binary weighted type DAC. And it makes use of low power current stimulator because of low LSB current. And it can make biphasic signal by connecting with Micro Controller Unit which controls period and amplitude of signal. As result of measurement INL is +0.56/-0.38 LSB and DNL is +0.3/-0.4 LSB. It shows great linearity. Power dissipation is 6mW.

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Controlling a lamprey-based robot with an electronic nervous system

  • Westphal, A.;Rulkov, N.F.;Ayers, J.;Brady, D.;Hunt, M.
    • Smart Structures and Systems
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    • v.8 no.1
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    • pp.39-52
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    • 2011
  • We are developing a biomimetic robot based on the Sea Lamprey. The robot consists of a cylindrical electronics bay propelled by an undulatory body axis. Shape memory alloy (SMA) actuators generate propagating flexion waves in five undulatory segments of a polyurethane strip. The behavior of the robot is controlled by an electronic nervous system (ENS) composed of networks of discrete-time map-based neurons and synapses that execute on a digital signal processing chip. Motor neuron action potentials gate power transistors that apply current to the SMA actuators. The ENS consists of a set of segmental central pattern generators (CPGs), modulated by layered command and coordinating neuron networks, that integrate input from exteroceptive sensors including a compass, accelerometers, inclinometers and a short baseline sonar array (SBA). The CPGs instantiate the 3-element hemi-segmental network model established from physiological studies. Anterior and posterior propagating pathways between CPGs mediate intersegmental coordination to generate flexion waves for forward and backward swimming. The command network mediates layered exteroceptive reflexes for homing, primary orientation, and impediment compensation. The SBA allows homing on a sonar beacon by indicating deviations in azimuth and inclination. Inclinometers actuate a bending segment between the hull and undulator to allow climb and dive. Accelerometers can distinguish collisions from impediment to allow compensatory reflexes. Modulatory commands mediate speed control and turning. A SBA communications interface is being developed to allow supervised reactive autonomy.