• 한국재료학회지
• /
• 제17권4호
• /
• pp.207-214
• /
• 2007

We fabricated thermally-evaporated 10 -Ni/(poly)Si and 10 -Ni/1 -Ir/(poly)Si structures to investigate the microstructure of nickel monosilicide at the elevated temperatures required for annealing. Silicides underwent rapid at the temperatures of 300-1200 for 40 seconds. Silicides suitable for the salicide process formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope(TEM) and an Auger depth profile scope were employed for the determination of vertical section structure and thickness. Nickel silicides with iridium on single crystal silicon actives and polycrystalline silicon gates shoed low resistance up to 1000 and 800, respectively, while the conventional nickle monosilicide showed low resistance below 700. Through TEM analysis, we confirmed that a uniform, 20 -thick silicide layer formed on the single-crystal silicon substrate for the Ir-inserted case while a non-uniform, agglomerated layer was observed for the conventional nickel silicide. On the polycrystalline silicon substrate, we confirmed that the conventional nickel silicide showed a unique silicon-silicide mixing at the high silicidation temperature of 1000. Auger depth profile analysis also supports the presence of thismixed microstructure. Our result implies that our newly proposed iridium-added NiSi process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

• 한국진공학회지
• /
• 제19권5호
• /
• pp.371-376
• /
• 2010

분자선 에피택시 장비를 이용하여 두 단계 방법(two-step method)으로 Si (100) 기판 위에 GaAs 에피층을 성장하였다. Si 기판은 초고진공을 유지하고 있는 MBE 성장 챔버 속에서 세척 방법을 달리하여 Si 기판표면에 존재하는 불순물(산소, 탄소 등)을 제거하였다. 첫 번째는 Si 기판을 몰리브덴 히터를 사용하여 $800^{\circ}C$로 직접 가열하였다. 두 번째는 Si 기판 표면에 As 빔을 조사시켜 주면서 $800^{\circ}C$로 Si 기판을 가열하였다. 세 번째는 Si 기판 표면에 Ga을 증착한 후 Si 기판을 $800^{\circ}C$로 가열하였다. 이와 같은 세 가지 다른 조건으로 세척한 Si(100) 기판 위에 성장한 GaAs 에피층의 특성은 reflection high-energy electron diffraction (RHEED), atomic force microscope (AFM), double crystal x-ray diffraction (DXRD), photoluminescence (PL), photoreflectance(PR) 등으로 조사하였다. Ga 빔을 증착하여 세척한 Si 기판 위에 성장된 GaAs 에피층의 RHEED 패턴은 ($2{\times}4$) 구조를 가지고 있었다. Ga 빔을 증착하여 세척한 Si 기판 위에 성장된 GaAs 에피층이 가장 좋은 결정성을 가지고 있었다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
• /
• pp.254-255
• /
• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

• 한국결정성장학회지
• /
• 제17권3호
• /
• pp.121-127
• /
• 2007

본 연구에서는 나노결정립의 $Mg_2Si$ 열전화합물을 제조하기 위하여 기계적 합금화(MA)를 적용하였다. 단상의 초미세 $Mg_2Si$ 열전화합물을 얻기 위하여 최적 볼밀조건 및 열처리 조건을 X선 회절분석과 시차주사 열량분석을 이용하여 조사하였다. $Mg_{66.7}Si_{33.3}$ 혼합분말을 $20{\sim}180$시간까지 볼밀 처리한 경우 모든 시료에서 $220^{\circ}C$ 및 $570^{\circ}C$ 근방에 broad한 발열 반응이 관찰되었다. 한편 $Mg_{66.7}Si_{33.3}$ 혼합분말을 260시간 동안 볼밀 처리한 경우 $230^{\circ}C$에 예리한 발열피크를 보였다. 단상의 $Mg_2Si$ 화합물은 $Mg_{66.7}Si_{33.3}$ 혼합분말을 60시간 동안 MA처리 후 $620^{\circ}C$까지 열처리함으로써 얻을 수 있었다. MA분말시료의 치밀화는 50MPa, $800{\sim}900^{\circ}C$에서 흑연다이를 사용하여 SPS 소결을 실시하였다. Mg-Si계 MA 분말시료의 SPS 소결시 수축은 $200^{\circ}C$ 근방에서 현저하게 관찰되었다. SPS법으로 고화된 성형체의 밀도측정 결과, 모든 시료에서 이론밀도의 94% 이상 금속광택을 나타내는 치밀한 소결체임을 알 수 있었다.

• 한국정밀공학회지
• /
• 제28권12호
• /
• pp.1419-1424
• /
• 2011

Nanoimprint lithography is a next generation lithography technology, which enables to fabricate nano to micron-scale patterns through simple and low cost process. Nanoimprint lithography has been applied in various industry fields such as light emitting diodes, solar cells and display. Functional patterns, including anti-reflection moth-eye pattern, photonic crystal pattern, fabricated by nanoimprint lithography are used to improve overall efficiency of devices in that fields. For these reasons, in this study, sub-micron-scaled functional patterns were directly fabricated on Si and glass substrates by thermal imprinting process using ZnO nano-particles dispersion resin. Through the thermal imprinting process, arrays of sub-micron-scaled pillar and hole patterns were successfully fabricated on the Si and glass substrates. And then, the topography, components and optical property of the imprinted ZnO nano-particles/resin patterns are characterized by Scanning Electron Microscope, Energy-dispersive X-ray spectroscopy and UV-vis spectrometer, respectively.

• 한국소음진동공학회:학술대회논문집
• /
• 한국소음진동공학회 2011년도 추계학술대회 논문집
• /
• pp.683-684
• /
• 2011

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
• /
• pp.125-126
• /
• 2007

Polycrystalline silicon thin-film-transistors (Poly-Si TFT's) with a amorphous-$Si_xGe_y$ seed layer have been fabricated to improve the performance of TFT. The dependence of crystal structure and electrical characteristics on the the Ge fractions in $Si_xGe_y$ seed layer were investigated. As a result, the increase of grain size and enhancement of electrical characteristics were obtained from the poly-Si TFT's with amorphous-SixGey seed layer.

• 한국결정성장학회지
• /
• 제30권3호
• /
• pp.96-102
• /
• 2020

본 논문에서는 6H-SiC (0001) 기판 위에 AlN 에피층을 혼합 소스 수소화물 기상 에피택시 방법에 의해 성장하였다. 시간당 5 nm의 성장률로 0.5 ㎛ 두께의 AlN 에피층을 얻었다. FE-SEM과 EDS 결과를 통해 6H-SiC (0001) 기판 위에 성장된 AlN 에피층 표면을 조사하였다. HR-XRD와 계산식을 통해 전위 밀도를 예측하였다. 1.4 × 10⁹ cm^-2의 나사 전위 밀도와 3.8 × 10⁹ cm^-2의 칼날 전위 밀도를 가지는 우수한 결정질의 AlN 에피층을 확인하였다. 혼합소스 HVP E 방법에 의해 성장된 6H-SiC 기판 위의 AlN 에피층은 전력소자 등에 응용이 가능할 것으로 판단된다.

• 한국재료학회지
• /
• 제16권9호
• /
• pp.571-577
• /
• 2006

We fabricated thermal evaporated 10 nm-Ni/(poly)Si and 10 nm-Ni/1 nm-Ir/(poly)Si films to investigate the thermal stability of nickel monosilicide at the elevated temperatures by rapid annealing them at the temperatures of $300{\sim}1200^{\circ}C$ for 40 seconds. Silicides for salicide process was formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester is used for sheet resistance. Scanning electron microscope and field ion beam were employed for thickness and microstructure evolution characterization. An x-ray diffractometer and an auger depth profile scope were used for phase and composition analysis, respectively. Nickel silicides with iridium on single crystal silicon actives and polycrystalline silicon gates showed low resistance up to $1200^{\circ}C$ and $800^{\circ}C$, respectively, while the conventional nickel monosilicide showed low resistance below $700^{\circ}C$. The grain boundary diffusion and agglomeration of silicides led to lower the NiSi stable temperature with polycrystalline silicon substrates. Our result implies that our newly proposed Ir added NiSi process may widen the thermal process window for nano CMOS process.

• 한국표면공학회:학술대회논문집
• /
• 한국표면공학회 2008년도 추계학술대회 초록집
• /
• pp.47-47
• /
• 2008

Cr and AlSi (Si=20 and 66 at.%) target들을 이용하여 Closed-field unbalanced magnetron sputtering (CFUBMS)으로 증착된 주기($\Lambda$)가 2.3 nm에서 8.0nm인 CrN/AlSiN multilayer coatings의 crystal structure, 화학적 조성, 및 기계적 특성을 glow discharge optical emission spectroscopy (GDOES), X-ray diffractometry (XRD), X-ray photoelectron spectroscopy (XPS) and nano-indenter 등의 분석장비를 이용하여 분석하였다. 고온안정성을 시험하기 위하여 $800^{\circ}C$와 $1000^{\circ}C$ 공기중 에서 30분 열처리하였다. CrN/AlSiN multilayer coatings의 고온안정성은 Si조성이 증가함에 따라 향상되었다. Si이 18.2 at.%함유된 coating이 가장 우수한 고온안정성을 갖고 있다.