• Title/Summary/Keyword: Nand Flash

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Multi-core Scalable Real-time Flash Storage Simulation (멀티 코어 확장성을 제공하는 실시간 플래시 저장장치 시뮬레이션)

  • Lee, Hyeon-gyu;Min, Sang Lyul;Kim, Kanghee
    • Journal of KIISE
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    • v.44 no.6
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    • pp.566-572
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    • 2017
  • As NAND flash storage is being widely used, its simulation methodologies have been studied in various aspects such as performance, reliability, and endurance. As a result, there have been advances in NAND flash storage simulation for both functional modeling and timing modeling. However, in addition to these advances, there is a need to drastically reduce the long simulation time that is required to evaluate the aging effect on flash storage. This paper proposes a so-called multi-core scalable real-time flash storage simulation method, which can control the simulation speed according to the user's preference. According to this method, it is possible to speed up the simulation in proportion to the number of CPU cores arbitrarily given while guaranteeing the correctness of the simulation result. Using our simulator implemented in the form of the Linux kernel module, we demonstrate the multi-core scalability and correctness of the proposed method.

Block Associativity Limit Scheme for Efficient Flash Translation Layer (효율적인 플래시 변환 계층을 위한 블록 연관성 제한 기법)

  • Ok, Dong-Seok;Lee, Tae-Hoon;Chung, Ki-Dong
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.6
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    • pp.673-677
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    • 2010
  • Recently, NAND flash memory has been widely used in embedded systems, personal computers, and server systems because of its attractive features, such as non-volatility, fast access speed, shock resistance, and low power consumption. Due to its hardware characteristics, specifically its 'erase-before-write' feature, Flash Translation Layer is required for using flash memory like hard disk drive. Many FTL schemes have been proposed, but conventional FTL schemes have problems such as block thrashing and block associativity problem. The KAST scheme tried to solve these problems by limiting the number of associations between data block and log block to K. But it has also block thrashing problem in random access I/O pattern. In this paper, we proposed a new FTL scheme, UDA-LBAST. Like KAST, the proposed scheme also limits the log block association, but does not limit data block association. So we could minimize the cost of merge operations, and reduce merge costs by using a new block reclaim scheme, log block garbage collection.

Flash-aware Page Management Policy of the Mobile DBMS for Incremental Map Update (점진적 맵 업데이트를 위한 모바일 DBMS의 플래시메모리 페이지 관리 기법)

  • Min, Kyoung Wook;Choi, Jeong Dan;Kim, Ju Wan
    • Spatial Information Research
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    • v.20 no.5
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    • pp.67-76
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    • 2012
  • Recently the mobile DBMS (Database Management System) is popular to store and manage large data in a mobile device. Especially, the research and development about mobile storage structure and querying method for navigation map data in a mobile device have been performed. The performance of the mobile DBMS in which random data accesses are most queries if the NAND flash memory is used as storage media of the DBMS is degraded. The reason is that the performance of flash memory is good in writing sequentially but bad in writing randomly as the features of the NAND flash memory. So, new storage structure and querying policies of the mobile DBMS are needed in the mobile DBMS in which a flash memory is used as storage media. In this paper, we have studied the policy of the database page management to enhance the performance of the frequent random update and applied this policy to the navigation-specialized mobile DBMS which supports incremental map update. And also we have evaluated the performance of this policy by experiments.

Efficient Page Allocation Method Considering Update Pattern in NAND Flash Memory (NAND 플래시 메모리에서 업데이트 패턴을 고려한 효율적인 페이지 할당 기법)

  • Kim, Hui-Tae;Han, Dong-Yun;Kim, Kyong-Sok
    • Journal of KIISE:Computer Systems and Theory
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    • v.37 no.5
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    • pp.272-284
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    • 2010
  • Flash Memory differs from the hard disk, because it cannot be overwritten. Most of the flash memory file systems use not-in-place update mechanisms for the update. Flash memory file systems execute sometimes block cleaning process in order to make writable space while performing not-in-place update process. Block cleaning process collects the invalid pages and convert them into the free pages. Block cleaning process is a factor that affects directly on the performance of the flash memory. Thus this paper suggests the efficient page allocation method, which reduces block cleaning cost by minimizing the numbers of block that has valid and invalid pages at a time. The result of the simulation shows an increase in efficiency by reducing more block cleaning costs than the original YAFFS.

Improving the Reliability and Performance of the YAFFS Flash File System (YAFFS 플래시 파일시스템의 성능과 안정성 향상)

  • Son, Ik-Joon;Kim, Yu-Mi;Baek, Seung-Jae;Choi, Jong-Moo
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.9
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    • pp.898-903
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    • 2010
  • Popularity of smartphones such as Google Android phones and Apple iphones, is increasing the demand on more reliable high performance file system for flash memory. In this paper, we propose two techniques to improve the performance of YAFFS (Yet Another Flash File System), while enhancing the reliability of the system. Specifically, we first propose to manage metadata and user data separately on segregated blocks and indexing information piggy-back technique for reducing mount time and also enhancing performance. Second, we tailor the wear-leveling to the segregated metadata and user data blocks. Performance evaluation results based on real hardware system with 1GB NAND flash memory show that the YAFFS with our proposed techniques realized outperforms the original YAFFS by six times in terms of mount speed and five times in terms of benchmark performance, while reducing the average erase count of blocks by 14%.

NAND Flash와 Software

  • Gwon, Mun-Sang;Lee, Sang-Hun;Jeong, Seung-Jin;Im, Seung-Ho
    • The Magazine of the IEIE
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    • v.37 no.3
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    • pp.31-42
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    • 2010
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A Compact Representation of Translation Pages for Flash Translation Layers of Solid State Drives

  • Kim, Yong-Seok
    • Journal of the Korea Society of Computer and Information
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    • v.24 no.2
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    • pp.1-7
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    • 2019
  • This paper presents CTP (Compact Translation Page), a compact representation of translation pages, for page mapping-based flash translation layers to improve RAM utilization and reduce the response time of solid state drives. CTP can store translation information twice in a translation page and the total number of translation pages stored in flash is reduced to half. Therefore, CTP halves the RAM size of the directory of translation pages and uses the saved RAM space for translation cache. CTP shows the best response time when compared to existing page mapping-based flash translation layers.

An Advanced Adaptive Garbage Collection Policy by Considering the Operation Characteristics (연산 특성을 고려한 향상된 적응적 가비지 컬렉션 정책)

  • Park, Song-Hwa;Lee, Jung-Hoon;Lee, Won-Oh;Kim, Hyun-Woo
    • IEMEK Journal of Embedded Systems and Applications
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    • v.13 no.5
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    • pp.269-277
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    • 2018
  • NAND flash memory has widely been used because of non-volatility, low power consumption and fast access time. However, it suffers from inability to provide update-in-place and the erase cycle is limited. The unit of read/write operation is a page and the unit of erase operation is a block. Moreover erase operation is slower than other operations. We proposed the Adaptive Garbage Collection (called "AGC") policy which focuses on not only reducing garbage collection process time for real-time guarantee but also wear-leveling for a flash memory lifetime. The AGC performs better than Cost-benefit policy and Greedy policy. But the AGC does not consider the operation characteristics. So we proposed the Advanced Adaptive Garbage Collection (called "A-AGC") policy which considers the page write operation count and block erase operation count. The A-AGC reduces the write operations by considering the data update frequency and update data size. Also, it reduces the erase operations by considering the file fragmentation. We implemented the A-AGC policy and measured the performance compared with the AGC policy. Simulation results show that the A-AGC policy performs better than AGC, specially for append operation.

Modulation Code for Removing Error Patterns on 4-Level NAND Flash Memory (4-레벨 낸드 플래시 메모리에서 오류 발생 패턴 제거 변조 부호)

  • Park, Dong-Hyuk;Lee, Jae-Jin;Yang, Gi-Ju
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.12C
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    • pp.965-970
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    • 2010
  • In the NAND flash memory storing two bits per cell, data is discriminated among four levels of electrical charges. We refer to these four levels as E, P1, P2, and P3 from the low voltage. In the statistics, many errors occur when E and P3 are stored at the next cells. Therefore, we propose a coding scheme for avoiding E-P3 or P3-E data patterns. We investigate two modulation codes for 9/10 code (9 bit input and 5 symbol codeword) and 11/12 code (11 bit input and 6 symbol codeword).