• Transactions on Electrical and Electronic Materials
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• v.12 no.1
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• pp.35-39
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• 2011

An electrically erasable programmable read-only memory (EEPROM) containing a stacked metal-insulator-metal (MIM) and n-well capacitor is proposed. It was fabricated using a 0.18 $\mu$m standard complementary metal-oxide semiconductor process. The depletion capacitance of the n-well region was effectively applied without sacrificing the cell-area and control gate coupling ratio. The device performed very similarly to the MIM capacitor cell regardless of the smaller cell area. This is attributed to the high control gate coupling ratio and capacitance. The erase speed of the proposed EEPROM was faster than that of the cell containing the MIM control gate.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.318-321
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• 2000

We showed that the change of Ar to $N_2$flow during the TiN deposition by the reactive sputtering decides the crystallinity of LPCVD W, as well as the electrical properties of the W-TiN/SiO$_2$Si capacitor. In particular, the threshold voltage can be controlled by the Ar to $N_2$ratio. As compared to the results obtained from the LPCVD W/SiO$_2$/Si MOS capacitor, the insertion of approximately 50 nm TiN film effectively prohibits the fluorine diffusion during the deposition and annealing of W films, resulting in negligible leakage currents at the low electric fields.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.9 no.1
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• pp.120-131
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• 2016

In this paper, a 512b MTP memory IP is designed by using MTP memory cells which are written by the FN (Fowler-Nordheim) tunneling method with only MV (medium voltage) devices of 5V which uses the back-gate bias, that is VNN (negative voltage). The used MTP cell consists of a CG (control gate) capacitor, a TG (tunnel gate) transistor, and a select transistor. To reduce the size of the MTP memory cell, just two PWs (P-wells) are used: one for the TG and the select transistors; and the other for the CG capacitor. In addition, just one DNW (deep N-well) is used for the entire 512b memory cell array. VPP and VNN generators supplying pumping voltages of ${\pm}8V$ which are insensitive to PVT variations since VPP and VNN level detectors are designed by a regulated voltage, V1V (=1V), provided by a BGR voltage generator.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.355-358
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• 2010

As CMOS technology continues to scale down, signal processing is favorably done in the digital domain, which requires Analog-to-Digital (A/D) Converter to be integrated on-chip. This paper presents a design methodology of 12-bit 1-MS/s Rail-to-Rail fully differential SAR ADC using Deep N-well Switch based on binary search algorithm. Proposed A/D Converter has the following architecture and techniques. Firstly, chip size and power consumption is reduced due to split capacitor array architecture and charge recycling method. Secondly, fully differential architecture is used to reduce noise between the digital part and converters. Finally, to reduce the mismatch effect and noise error, the circuit is designed to be available for Rail-to-Rail input range using simple Deep N-well switch. The A/D Converter fabricated in a TSMC 0.18um 1P6M CMOS technology and has a Signal-to-Noise-and-Distortion-Ratio(SNDR) of 69 dB and Free-Dynamic-Range (SFDR) of 73 dB. The occupied active area is $0.6mm^2$.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.4
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• pp.247-256
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• 2008

Regenerative energy generated by regenerative braking of DC traction can cause the system malfunction or damage to the rectifier, or malfunction of the power conversion device in power supply system by DC Line voltage rise in feeder line. Regenerative energy storage system using super capacitor is one of the ways to stabilize DC line voltage. In this paper, energy storage system of DC traction system using super-capacitor bank is implemented and using the field measurement data of the station N and the station S on the Line 2, the operation characteristics of line voltage caused by regenerative energy of electric trains are verified. Also, charge/discharge characteristics of super capacitor are verified as well. Thus, we can verify the operation characteristics of super-capacitor bank for regenerative energy storage system installed in DC Traction. And if we can use field measurement data of DC line voltage, we have obtained cost reduction. The stabilization of the system will be improved by measuring the operation characteristics of regenerative energy storage system in certain section operated by DC traction and predicting the capacity and lifetime of super-capacitor.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.5
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• pp.48-55
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• 1999

This paper describes automatic gain control circuit (AGC) design techniques for CMOS CCD camera interface systems. The required gain of the AGC in the proposed system is controlled directly by digital bits without conventional extra D/A converters and the signal settling behavior is almost independent of AGC gain variation at video speeds. A capacitor-segment combination technique to obtain large capacitance values considerably improves the effective bandwidth of the AGC based on switched-capacitor techniques. A proposed layout scheme for capacitor implementation shows AGC matching accuracy better than 0.1 %. The outputs from the AGC are transferred to a 10b A/D converter integrated on the same chip. The proposed AGC is implemented as a sub-block of a CCD camera interface system using a 0.5 um n-well CMOS process. The prototype shows the 32-dB AGC dynamic range in 1/8-dB steps with 173 mW at 3 V and 25 MHz.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.319-319
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• 2013

Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

• Resources Recycling
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• v.14 no.5 s.67
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• pp.32-39
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• 2005

Leaching behavior of nickel contained in waste Multi-Layer Ceramic Capacitor (MLCC) was investigated using a batch reactor. The effects of acid type, acid concentration, leaching temperature, particle size, and reaction time on the extraction of nickel metal from waste MLCC were examined. As a result, 97% of nickel contained in waste MLCC was leached out in 30 min at the temperature of $90^{\circ}C$ under the condition of $HNO_3$ concentration 1N, solid/liquid ratio 5 g/L and particle size $-300/+180{\mu}m$. It was also found that a Jander equation was useful to fit well the leaching rate data. The rate of nickel leaching is controlled by pore diffusion in $BaTiO_3$ layer and has an activation energy of 37.6 kJ/mol (9.0 kcal/mol).

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.587-590
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• 2000

For high-accuracy signal processing of differential capacitance transducers, an interface circuitry based on a switched-capacitor sample/hold circuit is developed. Driven by nonoverlapping two-phase clocks, the interface produces the output voltage which is proportional to the ratio of difference-to-sum of two capacitors of a differential transducer. Performances of a prototype chip fabricated using 0.6 $\mu\textrm{m}$ n-well CMOS process were measured and compared with those simulated by HSPICE. The measured results indicate that 0.1% resolution is achievable with the proposed interface and the temperature-dependence of the interface is small enough fur practical applications.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.10
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• pp.1888-1894
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• 2011

In this study, large-current (75 - 400 A), high-voltage (500 - 1000 $V_{rms}$), reliable capacitors with capacitances (C) of 100 - 1000 nF were developed for energy storage facility applications. Mica was used as the dielectric of the capacitors. In order to form a parallel stack of a capacitor element, 50 ${\mu}m$ thick mica sheets with a size of $30mm{\times}35mm$ were used with lead foils for the plate lead type of mica capacitors (HCM-L), while the same sizes of mica sheets coated by Ag paste were employed with lead foils for the parallel plate terminal type (HCM-C). The developed capacitors exhibited well behaviored device characteristics which meet the requirements of the capacitors. The developed capacitors also showed excellent characteristics for thermal shock test. The stability characteristics of developed capacitors for large current stress was superior to those measured for the capacitors prepared recently by CDETm.