• International Journal of Aeronautical and Space Sciences
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• v.16 no.2
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• pp.177-189
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• 2015

This paper presents an all-direct domain decomposition approach for large-scale structural analysis. The proposed approach achieves computational robustness and efficiency by enforcing the compatibility of the displacement field across the sub-domain boundaries via local Lagrange multipliers and augmented Lagrangian formulation (ALF). The proposed domain decomposition approach was compared to the existing FETI approach in terms of the computational time and memory usage. The parallel implementation of the proposed algorithm was described in detail. Finally, a preliminary validation was attempted for the proposed approach, and the numerical results of two- and three-dimensional problems were compared to those obtained through a dual-primal FETI approach. The results indicate an improvement in the performance as a result of the implementing the proposed approach.

• 제어로봇시스템학회:학술대회논문집
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• 1993.10b
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• pp.100-104
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• 1993

In Part 1, we derived robust stability conditions for an LTI interconnected to time-varying nonlinear perturbations belonging to several classes of nonlinearities. These conditions were presented in terms of positive definite solutions to LMI. In this paper we address a problem of synthesizing feedback controllers for linear time-invariant systems under structured time-varying uncertainties, combined with a worst-case H$_{2}$ performance. This problem is introduced in [7, 8, 15, 35] in case of time-invariant uncertainties, where the necessary conditions involve highly coupled linear and nonlinear matrix equations. Such coupled equations are in general difficult to solve. A convex optimization approach will be employed in this synthesis problem in order to avoid solving highly coupled nonlinear matrix equations that commonly arises in multiobjective synthesis problem. Using LMI formulation, this convex optimization problem can in turn be cast as generalized eigenvalue minimization problem, where an attractive algorithm based on the method of centers has been recently introduced to find its solution [30, 361. In the present paper we will restrict our discussion to state feedback case with Popov multipliers. A more general case of output feedback and other types of multipliers will be addressed in a future paper.

• Journal of Korea Society of Industrial Information Systems
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• v.10 no.3
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• pp.57-63
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• 2005

Kim and Fenn et al. proposed two modular AB multipliers based on LFSR(Linear Feedback Shift Register) architecture. These multipliers use AOP, which has all coefficients with '1', as an irreducible polynomial. Thereby, they have good hardware complexity compared to the previous architectures. This paper proposes a modular $AB^2$ multiplier based on LFSR architecture and a modular exponentiation architecture to improve the hardware complexity of the Kim's. Our multiplier also use the AOP as an irreducible polynomial as the Kim architecture. Simulation result shows that our multiplier reduces the hardware complexity about $50\%$ in the perspective of XOR and AND gates compared to the Kim's. The architecture could be used as a basic block to implement public-key cryptosystems.

• Journal of Korea Multimedia Society
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• v.9 no.12
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• pp.1607-1616
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• 2006

The growing market of multimedia and digital signal processing requires significant data-path portions of SoCs. However, the common models for verification are not suitable for SoCs. A novel model--WGL (Weighted Generalized List) is proposed, which is based on the general-list decomposition of polynomials, with three different weights and manipulation rules introduced to effect node sharing and the canonicity. Timing parameters and operations on them are also considered. Examples show the word-level WGL is the only model to linearly represent the common word-level functions and the bit-level WGL is especially suitable for arithmetic intensive circuits. The model is proved to be a uniform and efficient model for both bit-level and word-level functions. Then Based on the WGL model, a backward-construction logic-verification approach is presented, which reduces time and space complexity for multipliers to polynomial complexity(time complexity is less than $O(n^{3.6})$ and space complexity is less than $O(n^{1.5})$) without hierarchical partitioning. Finally, a construction methodology of word-level polynomials is also presented in order to implement complex high-level verification, which combines order computation and coefficient solving, and adopts an efficient backward approach. The construction complexity is much less than the existing ones, e.g. the construction time for multipliers grows at the power of less than 1.6 in the size of the input word without increasing the maximal space required. The WGL model and the verification methods based on WGL show their theoretical and applicable significance in SoC design.

• ETRI Journal
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• v.27 no.2
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• pp.206-218
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• 2005

We measure and compare externalities of IT and R&D capital stocks in different Korean industry sectors using inter-industry input-output tables of 1985, 1990, 1995 and 2000. We also compute the multiplier effects that relate to the directions of future economic effects. The key findings are as follows. First, we observed continuous capital deepening in all nine industries over the period of 1985 to 2000. Second, the backward multipliers of IT capital were the highest in the manufacturing industry. As for inter-industry externalities, the indirect backward multipliers, which exclude intra-industry backward multiplier effects within the industry, were also the highest in the manufacturing industry. Third, the forward multiplier effects of IT capital stock were the most substantial in the construction industry during the 1980s and in the manufacturing industry thereafter. Finally, using the transition multiplier matrix reflecting the backward effects of the two capitals in the past, the economic backward effects, especially the external economic effects, are predicted to increase through 2010 among all industries. The above findings suggest that, in order to maximize the forward and backward effects of the ever-increasing IT capital, we need to formulate an industry policy reducing the cost of capital accumulation in the manufacturing industry through improvement in productivity of the IT industry.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.8A
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• pp.1238-1244
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• 1999

In this paper, a new design of a triple-erroe-correcting (TEC) Reed-Solomon decoder is presented based on direct decoding method which is more efficient for the case of relatively small error correction capability. The proposed decoder requires only 9 GF(2m) multipliers in obtaining the error-locator polynomial and the error-evaluator polynomial, whereas other decoders needs 24 multipliers. Thus, the attractive feature of this decoder is its remarkable simplicity from the point of view of implementation. Futhermore, the proposed TEC Reed-Solomon decoder has very simple control circuit and short decoding delay. Therefore this decoder can be implemented by simple hardware and also save buffer memory which stores received sequence.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.6
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• pp.313-319
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• 2019

Finite field operations have played an important role in error correcting codes and cryptosystems. Recently, the necessity of efficient computation processing is increasing for security in cyber physics systems. Therefore, efficient implementation of finite field arithmetics is more urgently needed. These operations include addition, multiplication, division and inversion. Addition is very simple and can be implemented with XOR operation. The others are somewhat more complicated than addition. Among these operations, multiplication is the most important, since time-consuming operations, such as exponentiation, division, and computing multiplicative inverse, can be performed through iterative multiplications. In this paper, we propose a multiplexer based parallel computation algorithm that performs Montgomery multiplication over finite field using redundant basis. Then we propose an efficient multiplexer based semi-systolic multiplier over finite field using redundant basis. The proposed multiplier has less area-time (AT) complexity than related multipliers. In detail, the AT complexity of the proposed multiplier is improved by approximately 19% and 65% compared to the multipliers of Kim-Han and Choi-Lee, respectively. Therefore, our multiplier is suitable for VLSI implementation and can be easily applied as the basic building block for various applications.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.4
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• pp.35-41
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• 2000

In this paper, the multiplicative algorithm of two polynomals over finite field GF(2$^{m}$ ) is presented. The proposed algorithm permits an efficient realization of the parallel multiplication using iterative arrays. At the same time, it permits high-speed operation. This multiplier is consisted of three operation unit: multiplicative operation unit, the modular operation unit, the primitive irreducible operation unit. The multiplicative operation unit is composed of AND gate, X-OR gate and multiplexer. The modular operation unit is constructed by AND gate, X-OR gate. Also, an efficient pipeline form of the proposed multiplication scheme is introduced. All multipliers obtained have low circuit complexity permitting high-speed operation and interconnection of the cells are regular, well-suited for VLSI realization.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1137-1140
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• 2011

In this paper, the optimal condition for efficient active frequency multipliers is analyzed. This analysis is based on the effects from transistor nonlinear coefficients, harmonic impedances, and output parasitic components. From the analysis, normalized harmonic power is estimated with the clipping condition of a commercial transistor, and the condition for high conversion efficiency is suggested. From the analysis, a class-F frequency tripler was implemented for the output at 2.475 GHz, showing the maximum efficiency of 22.9 % and the maximum conversion gain of 9.5 dB.

• Structural Engineering and Mechanics
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• v.65 no.4
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• pp.369-380
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• 2018

In this paper, a multi-layered finite element model for laminated glass plates is introduced. A layer-wise theory is applied to the analysis of laminated glass due to the combination of stiff and soft layers; the independent layers are connected via Lagrange multipliers. The von $K{\acute{a}}rm{\acute{a}}n$ large deflection plate theory and the constant Poisson ratio for constitutive equations are assumed to capture the possible effects of geometric nonlinearity and the time/temperature-dependent response of the plastic foil. The linear viscoelastic behavior of a polymer foil is included by the generalized Maxwell model. The proposed layer-wise model was implemented into the MATLAB code and verified against detailed three-dimensional models in ADINA solver using different hexahedral finite elements. The effects of temperature, load duration, and creep/relaxation are demonstrated by examples.