• 한국전자거래학회지
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• 제8권1호
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• pp.113-119
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• 2003

This paper proposes a new multiplicative inverse algorithm for the Galois field GF (2/sup m/) whose elements are represented by optimal normal basis type Ⅱ. One advantage of the normal basis is that the squaring of an element is computed by a cyclic shift of the binary representation. A normal basis element is always possible to rewrite canonical basis form. The proposed algorithm combines normal basis and canonical basis. The new algorithm is more suitable for implementation than conventional algorithm.

• Journal of applied mathematics & informatics
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• 제30권1_2호
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• pp.201-210
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• 2012

A modified multiplicative update algorithms is presented for computing the nearest correlation matrix. The convergence property is analyzed in details and a sufficient condition is given to guarantee that the proposed approach will not breakdown. A number of numerical experiments show that the modified multiplicative updating algorithm is efficient, and comparable with the existing algorithms.

• ETRI Journal
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• 제35권2호
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• pp.193-199
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• 2013

This paper addresses nonnegative independent component analysis (NICA), with the aim to realize the blind separation of nonnegative well-grounded independent source signals, which arises in many practical applications but is hardly ever explored. Recently, Bertrand and Moonen presented a multiplicative NICA (M-NICA) algorithm using multiplicative update and subspace projection. Based on the principle of the mutual correlation minimization, we propose another novel cost function to evaluate the diagonalization level of the correlation matrix, and apply the multiplicative exponentiated gradient (EG) descent update to it to maintain nonnegativity. An efficient approach referred to as the EG-NICA algorithm is derived and its validity is confirmed by numerous simulations conducted on different types of source signals. Results show that the separation performance of the proposed EG-NICA algorithm is superior to that of the previous M-NICA algorithm, with a better unmixing accuracy. In addition, its convergence speed is adjustable by an appropriate user-defined learning rate.

• 제어로봇시스템학회논문지
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• 제14권2호
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• pp.111-117
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• 2008

This paper presents a new continuation-based quasi-steady-state(CQSS) time-domain simulation algorithm incorporating a multiplicative aggregated load model for power systems. The authors' previous paper introduced a CQSS algorithm, which has the robust convergent characteristic near the singularity point due to the application of a continuation method. The previous CQSS algorithm implemented the load restoration in power systems using the exponent-based load recovery model that is derived from the additive dynamic load model. However, the reformulated exponent-based model causes the inappropriate variation of short-term load characteristics when switching actions occur, during time-domain simulation. This paper depicts how to incorporate a multiplicative load restoration model, which does not have the problem of deforming short-term load characteristics, into the time simulation algorithm, and shows an illustrative example with a 39-bus test system.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(5)
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• pp.79-82
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• 2002

In this paper, we proposed a multiplicative algorithm for two polynomials in existence coefficients over finite field GF(3$^{m}$ ). Using the proposed multiplicative algorithm, we constructed the multiplier of modular architecture with parallel in-output. The proposed multiplier is composed of (m+1)$^2$identical cells, each cell consists of single mod(3) additional gate and single mod(3) multiplicative gate. Proposed multiplier need single mod(3) multiplicative gate delay time and m mod(3) additional gate delay time not clock. Also, the proposed architecture is simple, regular and has the property of modularity, therefore well-suited for VLSI implementation.

• 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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• 제7권6호
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• pp.696-702
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• 2001

본 논문에서는 DES 보다 암호학적 강도가 뛰어난 것으로 알려져 있는 IDEA 알고리즘에서 가장 많은 계산량이 요구되는 모듈러 2$^{16}$ +1에 대한 곱셈의 역원 연산을 페르마의 소정리를 응용하여 IEDA의 처리 속도를 향상시키는 방법을 제안한다. 본 논문에서 제안하고 있는 페르마 소정리를 응용한 모듈러 2$^{16}$ +1에 대한 곱셈의 역원 연산 방식은 기존의 확장 유클리드 알고리즘을 적용한 방식보다 필요한 연산 횟수를 약 50%정도 감소시킨다. 제안한 곱셈의 역원 방식을 적용하여 단일 라운드 반복 구조로 설계한 IDEA 하드웨어의 최대 동작 주파수는 20 MHz이고 게이트 수는 118,774 gate이며 처리 속도는 116 Mbits/sec이다. 동일한 단일 라운드 반복 구조로 설계된 H.Bonnenberg에 의한 기존의 연구보다 처리속도가 약 2배정도 빠르다. 이것은 본 논문에서 제안한 모듈러 2$^{16}$ +1에 대한 곱셈의 역원 연산 방식이 속도면에서 효율적임을 나타내고 있다.

• 전자공학회논문지B
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• 제31B권3호
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• pp.60-68
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• 1994

In this paper, the multiplicative algorithm of two polynomials over finite field GF(($p^{m}$) is presented. Using the presented algorithm, the multiple-valued multiplier of the serial input-output modular structure by CCD is constructed. This multiple-valued multiplier on CCD is consisted of three operation units: the multiplicative operation unit, the modular operation unit, and the primitive irreducible polynomial operation unit. The multiplicative operation unit and the primitive irreducible operation unit are composed of the overflow gate, the inhibit gate and mod(p) adder on CCD. The modular operation unit is constructed by two mod(p) adders which are composed of the addition gate, overflow gate and the inhibit gate on CCD. The multiple-valued multiplier on CCD presented here, is simple and regular for wire routing and possesses the property of modularity. Also. it is expansible for the multiplication of two elements on finite field increasing the degree mand suitable for VLSI implementation.

• 전자공학회논문지SC
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• 제39권4호
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• pp.36-42
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• 2002

본 논문에서는 유한체 GF($P^m$)상에서 모든 항의 계수가 이 아닌 두 다항식의 승산 알고리즘을 제시하였다. 제시된 승산 알고리즘을 이용하여 모듈 구조의 병렬 입-출력 승산기를 구성하였다. 제시된 승산기는 $(m+1)^2$개의 동일한 셀로 구성되었으며, 각각의 셀은 1개의 mod(p) 가산 게이트와 1개의 mod(p) 승산 게이트로 구성되었다. 본 논문에서 제시된 승산기는 클럭이 필요하지 않고 m개의 mod(p) 가산 게이트 지연시간과 1개의 mod(p) 승산 게이트 소자 지연시간만을 필요로 한다. 또한, 제시된 승산기는 규칙성과 셀 배열에 의한 모듈성을 가지므로 VLSI 회로 실현에 적합할 것이다.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• 제26권3호
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• pp.156-184
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• 2022

In this article, we propose a novel variational model for restoring color images corrupted by mixed multiplicative Gamma noise and additive Gaussian noise. The model involves a data-fidelity term that characterizes the mixed noise as an infimal convolution of two noise distributions and the saturation-value total variation (SVTV) regularization. The data-fidelity term facilitates suitable separation of the multiplicative Gamma and Gaussian noise components, promoting simultaneous elimination of the mixed noise. Furthermore, the SVTV regularization enables adequate denoising of homogeneous regions, while maintaining edges and details and diminishing the color artifacts induced by noise. To solve the proposed nonconvex model, we exploit an alternating minimization approach, and then the alternating direction method of multipliers is adopted for solving subproblems. This contributes to an efficient iterative algorithm. The experimental results demonstrate the superior performance of the proposed model compared to other existing or related models, with regard to visual inspection and image quality measurements.

• 한국통신학회논문지
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• 제28권2A호
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• pp.102-109
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• 2003

본 논문에서는 GF(2m)상의 표준기저를 사용한 새로운 형태의 승산 알고리즘을 제안하였다. 제안된 알고리즘에서 승산의 전개를 데이터 선택방식으로 취하여 연산과정을 단순화하였다. 승산연산의 결과 발생하는 m차 이상의 차수를 갖는 항에 대하여 기약다항식을 적용하여 m-1차 이하의 표준기저들로 나타나게 하였다. 제안된 알고리즘의 회로구현을 위해 멀티플렉서를 사용하여 회로를 구성하였고, GF(24)에 대한 설계의 예를 보였다. 새로운 승산회로는 그 구성이 규칙성을 가지며 m의 증가에 대한 확장이 용이하다. 또한, 타 논문과의 비교결과 사용소자의 수가 비교적 적다. 따라서, VLSI의 실현과 타 연산회로에의 적용에 적합하다 할 수 있다.