• Journal of Advanced Navigation Technology
• /
• v.14 no.5
• /
• pp.710-717
• /
• 2010

Even though there are 256 possible 1-qudit(1-variable quantum digit) functions in quaternary logic, the most useful functions are 4!=24 ones capable of representing in QGFSOP expressions by possible permuting of 0,1,2, and 3. In this paper, we propose a permutational literal(PL) representation and a QPL(Quaternary PL) gate which use the operands of a multiplicand A and an augend D in $Ax^C$+D(GF4) operation as a control variable of multi-cascaded PLs. And we also present new PL synthesis algorithms to synthesize QGFSOP expressed 24 (1-qudit) functions by applying three PL operators as ab(mutual permutation), + D(addition), and XA (multiplication). Finally architectures, circuits, and a CMOS implementation to realize proposed PL synthesis algorithms for $Ax^C$+D(GF4) functions are presented.

• Journal of Elementary Mathematics Education in Korea
• /
• v.15 no.1
• /
• pp.1-18
• /
• 2011

The purpose of this study was to investigate the effects of estimation strategy on placing decimal point in multiplication and division of decimals. To examine the effects of improving calculation ability and reducing decimal point errors with this estimation strategy, the experimental research on operation with decimal was conducted. The operation group conducted the decimal point estimation strategy for operating decimal fractions, whereas the control group used the traditional method with the same test paper. The results obtained in this research are as follows; First, the estimation strategy with understanding a basic meaning of decimals was much more effective in calculation improvement than the algorithm study with repeated calculations. Second, the mathematical problem solving ability - including the whole procedure for solving the mathematical question - had no effects since the decimal point estimation strategy is normally performed after finishing problem solving strategy. Third, the estimation strategy showed positive effects on the calculation ability. Th Memorizing algorithm doesn't last long to the students, but the estimation strategy based on the concept and the position of decimal fraction affects continually to the students. Finally, the estimation strategy assisted the students in understanding the connection of the position of decimal points in the product with that in the multiplicand or the multiplier. Moreover, this strategy suggested to the students that there was relation between the placing decimal point of the quotient and that of the dividend.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.11A
• /
• pp.1092-1097
• /
• 2005

In this paper, we propose a low-power Booth multiplication which reduces the switching activities of partial products during multiplication process. Radix-4 Booth algorithm has a characteristic that produces the Booth encoded products with zero when input data have sequentially equal values (0 or 1). Therefore, partial products have higher chances of being zero when an input with a smaller effective dynamic range of two multiplication inputs is used as a multiplier data instead of a multiplicand. The proposed multiplier divides a multiplication expression into several multiplication expressions with smaller bits than those of an original input data, and each multiplication is computed independently for the Booth encoding. Finally, the results of each multiplication are added. This means that the proposed multiplier has a higher chance to have zero encoded products so that we can implement a low power multiplier with the smaller switching activity. Implementation results show the proposed multiplier can save maximally about $20\%$ power dissipation than a previous Booth multiplier.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.12C
• /
• pp.1256-1261
• /
• 2005

In this paper, we propose a low-power Booth multiplication which reduces the switching activities of partial products during multiplication process. Radix-4 Booth algorithm has a characteristic that produces the Booth encoded products with zero when input data have sequentially equal values (0 or 1). Therefore, partial products have higher chances of being zero when an input with a smaller effective dynamic range of two multiplication inputs is used as a multiplier data instead of a multiplicand. The proposed multiplier divides a multiplication expression into several multiplication expressions with smaller bits than those of an original input data, and each multiplication is computed independently for the Booth encoding. Finally, the results of each multiplication are added. This means that the proposed multiplier has a higher chance to have zero encoded products so that we can implement a low power multiplier with the smaller switching activity. Implementation results show the proposed multiplier can save maximally about $20\%$ power dissipation than a previous Booth multiplier.

• Journal of Elementary Mathematics Education in Korea
• /
• v.21 no.1
• /
• pp.195-214
• /
• 2017

The standardized algorithm of natural number multiplication simplify the procedure of arithmetic. In the case of multiplication algorithm with regrouping, we write small the carrying number on the multiplicand. But, teachers and students have to make their own way about the case of two digits multipliers, because Korean elementary mathematics textbooks just deal with the case of the one digit multipliers. In this study, we investigated Korean current elementary mathematics textbooks related to multiplication algorithm with regrouping, and analyzed the result of research on the real condition about marking the carrying number. Besides, we reviewed the guidance contents of algorithm of natural number multiplication in Finland's math textbook and literature. By conclusions, we suggest several implications as followed; First, we need some examples of the way to mark the carrying number in teacher's guidance books and textbooks. Second, teachers try for students to feel the good points of the systematic ways to mark the carrying number. Third, teachers understand algorithm of natural number multiplication and the alternative ways about marking the carrying number.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.12 no.7
• /
• pp.1209-1217
• /
• 2008

In this paper, we present a new bit-parallel multiplier for performing the bit-parallel multiplication of two polynomials in the finite fields $GF(2^m)$. Prior to construct the multiplier circuits, we consist of the vector code generator(VCG) to generate the result of bit-parallel multiplication with one coefficient of a multiplicative polynomial after performing the parallel multiplication of a multiplicand polynomial with a irreducible polynomial. The basic cells of VCG have two AND gates and two XOR gates. Using these VCG, we can obtain the multiplication results performing the bit-parallel multiplication of two polynomials. Extending this process, we show the design of the generalized circuits for degree m and a simple example of constructing the multiplier circuit over finite fields $GF(2^4)$. Also, the presented multiplier is simulated by PSpice. The multiplier presented in this paper use the VCGs with the basic cells repeatedly, and is easy to extend the multiplication of two polynomials in the finite fields with very large degree m, and is suitable to VLSI.

• The Mathematical Education
• /
• v.61 no.1
• /
• pp.157-178
• /
• 2022

Mathematics teachers' content knowledge is an important asset for effective teaching. To enhance this asset, teacher's knowledge is required to be diagnosed and developed. In this study, we employed problem-posing and problem-solving tasks to diagnose preservice teachers' understanding of fraction multiplication. We recruited 41 elementary preservice teachers who were taking elementary mathematics methods courses in Korea and the United States and gave the tasks in their final exam. The collected data was analyzed in terms of interpreting, understanding, model, and representing of fraction multiplication. The results of the study show that preservice teachers tended to interpret (fraction)×(fraction) more correctly than (whole number)×(fraction). Especially, all US preservice teachers reversed the meanings of the fraction multiplier as well as the whole number multiplicand. In addition, preservice teachers frequently used 'part of part' for posing problems and solving posed problems for (fraction)×(fraction) problems. While preservice teachers preferred to a area model to solve (fraction)×(fraction) problems, many Korean preservice teachers selected a length model for (whole number)×(fraction). Lastly, preservice teachers showed their ability to make a conceptual connection between their models and the process of fraction multiplication. This study provided specific implications for preservice teacher education in relation to the meaning of fraction multiplication, visual representations, and the purposes of using representations.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.43 no.5 s.311
• /
• pp.36-43
• /
• 2006

In this paper we present a new high-speed parallel multiplier for Performing the bit-parallel multiplication of two polynomials in the finite fields $GF(2^m)$. Prior to construct the multiplier circuits, we consist of the MOD operation part to generate the result of bit-parallel multiplication with one coefficient of a multiplicative polynomial after performing the parallel multiplication of a multiplicand polynomial with a irreducible polynomial. The basic cells of MOD operation part have two AND gates and two XOR gates. Using these MOD operation parts, we can obtain the multiplication results performing the bit-parallel multiplication of two polynomials. Extending this process, we show the design of the generalized circuits for degree m and a simple example of constructing the multiplier circuit over finite fields $GF(2^4)$. Also, the presented multiplier is simulated by PSpice. The multiplier presented in this paper use the MOD operation parts with the basic cells repeatedly, and is easy to extend the multiplication of two polynomials in the finite fields with very large degree m, and is suitable to VLSI. Also, since this circuit has a low propagation delay time generated by the gates during operating process because of not use the memory elements in the inside of multiplier circuit, this multiplier circuit realizes a high-speed operation.

• School Mathematics
• /
• v.7 no.2
• /
• pp.139-168
• /
• 2005

The purpose of this study is to investigate children's informal knowledge of the fractional multiplication and to develop a teaching material connecting the informal and the formal knowledge. Six lessons of the pre-teaching material are developed based on literature reviews and administered to the 7 students of the 4th grade in an elementary school. It is shown in these teaching experiments that children's informal knowledge of the fractional multiplication are the direct modeling of using diagram, mathematical thought by informal language, and the representation with operational expression. Further, teaching and learning methods of formalizing children's informal knowledge are obtained as follows. First, the informal knowledge of the repeated sum of the same numbers might be used in (fractional number)$\times$((natural number) and the repeated sum could be expressed simply as in the multiplication of the natural numbers. Second, the semantic meaning of multiplication operator should be understood in (natural number)$\times$((fractional number). Third, the repartitioned units by multiplier have to be recognized as a new units in (unit fractional number)$\times$((unit fractional number). Fourth, the partitioned units should be reconceptualized and the case of disjoint between the denominator in multiplier and the numerator in multiplicand have to be formalized first in (proper fractional number)$\times$(proper fractional number). The above teaching and learning methods are melted in the teaching meterial which is made with corrections and revisions of the pre-teaching meterial.

• Child Health Nursing Research
• /
• v.7 no.1
• /
• pp.62-73
• /
• 2001

The purpose of the study is to identify the differences about knowledge and attitude between the subjects exposed to pc pornography and the control group not exposed to pc pornography. The study was executed from July 12 through July 16. The subjects were 423 middle school boys. The comparison points were their ethical sexual knowledges and sexual attitudes. The collected data was analysed by SPSS WIN(including multiplicand, percentage, χ²-test, revised Fisher and t-test). The results of their study were as follows ; 1. The pc-related characteristics of the subjects. The subjects exposed pc pornography showed 51.8％ rate of exposure to printed pornography. The control group showed the rate of 26.4％. The former group owned their pc(81.5％), however, the latter group showed 66.7％. The former group set their pc sets in their study rooms(66.1％) however, the latter group installed those in their study rooms(73.6％). The former group experienced internet pc communications(62.5％),however, the latter group showed 40.2％. The former group made use of their pc sets in recreation(entertainment) programs(77.0％), however, the latter group showed the rate of 67.8％. The former group showed that their school performance levelled up after their pc manipulation(80.0％), however, the latter group showed the rate of 86.2％. The former group replied that their pc manipulation contributed to their friendship(50.3％), however, the latter group showed the higher rate of 74.7％. The both groups replied that their family dialogs and contacts rather reduced (78.9％ and 78.2％ respectively). The both groups revealed that they reduced the TV watching the rate 76.5％ and 48.3％ respectively. The differences between two groups were surveyed in the level of 95％ significance and the items such as 'contacts to printed pornography, pc possession or none, pc use rate, friendship occasions and the reduced time of TV watching' showed the significant differences. 2. The differences of two groups' sexual knowledges. As to the sexual knowledges, the both groups showed 41.1 and 34.1 points against 100 points respectively. The statistical differences were significant(t=2.72, p=.007). The 5 items among 17 showed the significant differences between two groups. 'The concept of masturbation' was χ²=5.033, p=.025. 'The prejudice to masturbation' showed χ²=9.902, p=.002 'The difference between female and male as to sexual excitement' showed χ²=7.985, p=.005. 'The positiveness of masturbation' showed χ²=10.205, p=.001. 'The differences between two sexes as to sexual impulse and sexual desire' showed χ²=8.463, p=.004. In conclusion, The former group showed the higher knowledges than the latter group. 3. The differences of two groups' sexual attitudes. The 4 items such as 'the curiosity to the other sex'(t=2.22, p=.027), 'the attention to pornography'(t=3.39, p=.001), 'the permission to pre-marriage intercourse'(t=2.15, p=.032) and 'the preference to the female body exposure'(t=2.67, p=.008) showed the differences between two groups as to sexual attitudes.