• Composites Research
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• v.35 no.3
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• pp.182-187
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• 2022

In this paper, the thickness of a multilayer PCB was predicted through an empirical formulation based on the physical properties of the prepreg used in multilayer PCB. Since the thickness of prepreg reduction when manufacturing a PCB due to the physical properties and copper foil residual rate, it is necessary to accurately predict the thickness of the PCB through the thickness empirical formulation. To determine the density of the prepreg, the mass and thickness of the prepreg were measured. To manufacture the CCL, the prepreg and copper foil were laminated using a hot press machine, and the thickness was measured using a microscope and micrometer. An 8-layerd PCB was designed with different circuit densities to measure the change in the thickness with the copper foil residual ratio, and the proposed empirical formulation was verified by comparing the measured thickness with the value obtained using the empirical formulation. As a result, the errors for the CCL and multilayer PCB were 2.56% and 4.48%, respectively, which demonstrated the reliability of the empirical formulation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.04b
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• pp.150-152
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• 2004

The number of layers in rigid PCB(printed circuit board) is restricted, so the number of components can be embedded in module is restricted also. But using flexible multilayer PCB, the layers over than 7 can be evaluated. In this study, to verify the possibility of application of flexible multilayer PCB to RF modules, multilayered embedded capacitor is fabricated and analyzed. The characteristics of embedded capacitor is analyzed and compared to that of MLCC and LTCC capacitor. Embedded capacitor has better electrical features than MLCC and compatible one to LTCC capacitor.

• Proceedings of the Materials Research Society of Korea Conference
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• 2004.05a
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• pp.38-38
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• 2004

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.94-98
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• 2023

In the case of high-speed data transmission on high multilayer boards, signal coherence is a problem, especially due to the via hole, and a solution to improve return loss or insertion loss by applying a back drill to the via hole is being proposed. In this paper, Near-Field Electromagnetic measurements were made on a high multilayer board to determine how the presence or absence of back drill affects signal consistency. For this purpose, we used a signal generator, spectrum analyzer, and EMC scanner on a test board to determine if it is possible to distinguish between areas with and without back drill in the via holes of the stubs on the board. Also, we analyzed the measured value of S11, S21 and EMC etc. for how much it improves the signal attenuation of the stub with back drill. Through this, we knew that less electromagnetic waves are generated the stub via with back drill. At future research, we will analyze how much it improves the signal loss and electromagnetic waves due to the depth of back drill.

• Journal of electromagnetic engineering and science
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• v.2 no.2
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• pp.68-74
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• 2002

In this paper, a pre-layout design approach for high-speed microprocessor is proposed. For multilayer PCB stark up configuration as well as selection and placement of decoupling capacitors, an effective solution for reducing SSN and EMI is obtained by modeling and simulation of complete power distribution system. The system model includes VRM, decoupling capacitors, multiple power and ground planes for core voltage, vias, as well as microprocessor. Finally, the simulation results are verified by measurements data.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.11
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• pp.34-42
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• 1997

In this paper, we show an optimal structure of impedance control in high density layouts ina high multilayers PCB. The impedance control in a high multilayers FR-4 PCB is very portant isue because a dielectric layer's thickness is very thin. Especially, odd mode impedance control is more difficult than characteristic impedance control in high multilayers PCB. So, we show an optimal structure of odd mode impedance control in that dielectric thickness is about 0.1mm with limited state and discuss multilayers PCB's for swich circuti pack and backplane in developing algorith scale ATM witching system in next time.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.10
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• pp.61-70
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• 1996

In this paper, we find the values of near-end crosstalk coefficient in striplines of a FR-4 multilayer PCB by an analytic method and a HSPICE simulation method, and define calcualtion errors in an analytic method and define the application range, and simualte near-end crosstalk coefficients of the FCT (fast CMOS TTL) in complicated striplines by HSPICE and analyze near-en crosstalk coefficients in relation to dielectric thickness and trace spaces of striplines. As a result, we analyze coupling structure of the near-end crosstalk in the coplicated sstriplines that are impedance matched and define a coupling formula of near-end crosstalk coefficients in general complicated striplines. Especially, it is approximated in the layout grade rule.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.4
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• pp.20-29
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• 1998

In this paper, we find the values of near-end crosstalk coefficients in dual-offset stripline of a FR-4 multilayer PCB by an analytic method and a HSPICE simulation method, define calculation errors inananlytic method and the application range, simulate near-end crosstalk coefficients of the FCT(Fast CMOS TTL) in complicated dual-offset stripline by HSPICE and analyze near-end crosstalk and far-end crosstalk coefficients in dual-offset stripline. So, we analyze coupling structure of the near-end crosstalk and far-end crosstalk in the complicated dual-offset striplines that are 1[pF] capacitors termainated, and define a coupling formula of near-end crosstalk and far-end crosstalk coefficients dual-offset striplines.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.73-81
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• 2011

As high speed digital systems continue to use components with faster edge rate and clock speeds, transmission of the digital information, it can bring about many troubles. The increasing requirement for controlled impedance PCBs becomes both a critical success factor and a design challenge to implement a system. Especially, the noise sources in high frequency digital systems include the noise in power supply, ground and packaging, and they destroy the fidelity of signals. Therefore PCB design with impendence matching is needed to improve fidelity of signal in H/W. In this paper, we have developed an impedance control and analysis tool for multi-layer PCB design, and simulates the tracks controlled impedance with the test coupon. So, it can save the design time and support the economical PCB design.

• Journal of the Semiconductor & Display Technology
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• v.17 no.1
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• pp.62-65
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• 2018

In the era of the 4th Industrial Revolution, IoT products of various and specialized fields are being developed and produced. Especially, the generation of the artificial intelligence, robotic technology Multilayer substrates and packaging technologies in the notebook, mobile device, display and semiconductor component industries are demanding the need for flexible materials along with miniaturization and thinning. To do this, this work use FCCL (Flexible Copper Clad Laminate), which is a flexible printed circuit board (PCB), to implement FPCB (Flexible PCB), COF (Chip on Film) Use is known to be essential. In this paper, I propose a transfer device which prevents the occurrence of scratches by analyzing the mechanism of wrinkle and scratch mechanism during the transfer process of thin film material in which the thickness increases while continuously moving in air or solution.