Analysis of crosstalk of dual-offset stripline in a FR-4 high multilayer PCB

박판화된 다층기판에서 dual-offset stripline 구조의 누화 해석

  • 이명호 (한국전자통신연구원 ATM기술연구부) ;
  • 전용일 (한국전자통신연구원 ATM기술연구부) ;
  • 전병윤 (한국전자통신연구원 ATM기술연구부) ;
  • 박권철 (한국전자통신연구원 ATM기술연구부) ;
  • 강석열 (한국전자통신연구원 ATM기술연구부)
  • Published : 1998.04.01

Abstract

In this paper, we find the values of near-end crosstalk coefficients in dual-offset stripline of a FR-4 multilayer PCB by an analytic method and a HSPICE simulation method, define calculation errors inananlytic method and the application range, simulate near-end crosstalk coefficients of the FCT(Fast CMOS TTL) in complicated dual-offset stripline by HSPICE and analyze near-end crosstalk and far-end crosstalk coefficients in dual-offset stripline. So, we analyze coupling structure of the near-end crosstalk and far-end crosstalk in the complicated dual-offset striplines that are 1[pF] capacitors termainated, and define a coupling formula of near-end crosstalk and far-end crosstalk coefficients dual-offset striplines.

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