• Title/Summary/Keyword: Multi-stacked

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Analysis of Performance, Energy-efficiency and Temperature for 3D Multi-core Processors according to Floorplan Methods (플로어플랜 기법에 따른 3차원 멀티코어 프로세서의 성능, 전력효율성, 온도 분석)

  • Choi, Hong-Jun;Son, Dong-Oh;Kim, Jong-Myon;Kim, Cheol-Hong
    • The KIPS Transactions:PartA
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    • v.17A no.6
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    • pp.265-274
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    • 2010
  • As the process technology scales down and integration densities continue to increase, interconnection has become one of the most important factors in performance of recent multi-core processors. Recently, to reduce the delay due to interconnection, 3D architecture has been adopted in designing multi-core processors. In 3D multi-core processors, multiple cores are stacked vertically and each core on different layers are connected by direct vertical TSVs(through-silicon vias). Compared to 2D multi-core architecture, 3D multi-core architecture reduces wire length significantly, leading to decreased interconnection delay and lower power consumption. Despite the benefits mentioned above, 3D design technique cannot be practical without proper solutions for hotspots due to high temperature. In this paper, we propose three floorplan schemes for reducing the peak temperature in 3D multi-core processors. According to our simulation results, the proposed floorplan schemes are expected to mitigate the thermal problems of 3D multi-core processors efficiently, resulting in improved reliability. Moreover, processor performance improves by reducing the performance degradation due to DTM techniques. Power consumption also can be reduced by decreased temperature and reduced execution time.

Numerical Analysis of Warpage and Stress for 4-layer Stacked FBGA Package (4개의 칩이 적층된 FBGA 패키지의 휨 현상 및 응력 특성에 관한 연구)

  • Kim, Kyoung-Ho;Lee, Hyouk;Jeong, Jin-Wook;Kim, Ju-Hyung;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.2
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    • pp.7-15
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    • 2012
  • Semiconductor packages are increasingly moving toward miniaturization, lighter and multi-functions for mobile application, which requires highly integrated multi-stack package. To meet the industrial demand, the package and silicon chip become thinner, and ultra-thin packages will show serious reliability problems such as warpage, crack and other failures. These problems are mainly caused by the mismatch of various package materials and geometric dimensions. In this study we perform the numerical analysis of the warpage deformation and thermal stress of 4-layer stacked FBGA package after EMC molding and reflow process, respectively. After EMC molding and reflow process, the package exhibits the different warpage characteristics due to the temperature-dependent material properties. Key material properties which affect the warpage of package are investigated such as the elastic moduli and CTEs of EMC and PCB. It is found that CTE of EMC material is the dominant factor which controls the warpage. The results of RSM optimization of the material properties demonstrate that warpage can be reduced by $28{\mu}m$. As the silicon die becomes thinner, the maximum stress of each die is increased. In particular, the stress of the top die is substantially increased at the outer edge of the die. This stress concentration will lead to the failure of the package. Therefore, proper selection of package material and structural design are essential for the ultra-thin die packages.

Analysis on the Performance and Temperature of the 3D Quad-core Processor according to Cache Organization (캐쉬 구성에 따른 3차원 쿼드코어 프로세서의 성능 및 온도 분석)

  • Son, Dong-Oh;Ahn, Jin-Woo;Choi, Hong-Jun;Kim, Jong-Myon;Kim, Cheol-Hong
    • Journal of the Korea Society of Computer and Information
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    • v.17 no.6
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    • pp.1-11
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    • 2012
  • As the process technology scales down, multi-core processors cause serious problems such as increased interconnection delay, high power consumption and thermal problems. To solve the problems in 2D multi-core processors, researchers have focused on the 3D multi-core processor architecture. Compared to the 2D multi-core processor, the 3D multi-core processor decreases interconnection delay by reducing wire length significantly, since each core on different layers is connected using vertical through-silicon via(TSV). However, the power density in the 3D multi-core processor is increased dramatically compared to that in the 2D multi-core processor, because multiple cores are stacked vertically. Unfortunately, increased power density causes thermal problems, resulting in high cooling cost, negative impact on the reliability. Therefore, temperature should be considered together with performance in designing 3D multi-core processors. In this work, we analyze the temperature of the cache in quad-core processors varying cache organization. Then, we propose the low-temperature cache organization to overcome the thermal problems. Our evaluation shows that peak temperature of the instruction cache is lower than threshold. The peak temperature of the data cache is higher than threshold when the cache is composed of many ways. According to the results, our proposed cache organization not only efficiently reduces the peak temperature but also reduces the performance degradation for 3D quad-core processors.

Design of Multi-Band Internal Antenna for Handset Applications Including Media-FLO Band (미디어플로대역을 포함하는 단말기용 다중 대역 내장형 안테나의 설계)

  • Lee, Hyun-Kyu;Lee, Byung-Je
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.7 no.3
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    • pp.48-55
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    • 2008
  • This paper presents a design of a multi-band infernal antenna for mobile handsets which can cover the major mobile services such as WiBro/WiMAX mobile internet services and Media-FLO/S-DMB services. Using wideband monopole antenna structure, the proposed antenna obtains the wide bandwidth characteristic at high Sequency band to be applicable for new mobile services. Stacking meandered radiator on the wideband monopole radiator and obtaining the different current path and lenga on these stacked radiators, overall antenna volume is effectively reduced. The measured bandwidths (VSWR<3) of the proposed antenna is 270 MHz and 2032 MHz at low and high band, respectively. This antenna can effectively covers major wireless communication bands including Media-FLO, CDMA, GSM, GPS, DCS, PCS, UMTS, WiBro, WiMAX, and S-DMB.

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Real-time hybrid simulation of a multi-story wood shear wall with first-story experimental substructure incorporating a rate-dependent seismic energy dissipation device

  • Shao, Xiaoyun;van de Lindt, John;Bahmani, Pouria;Pang, Weichiang;Ziaei, Ershad;Symans, Michael;Tian, Jingjing;Dao, Thang
    • Smart Structures and Systems
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    • v.14 no.6
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    • pp.1031-1054
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    • 2014
  • Real-time hybrid simulation (RTHS) of a stacked wood shear wall retrofitted with a rate-dependent seismic energy dissipation device (viscous damper) was conducted at the newly constructed Structural Engineering Laboratory at the University of Alabama. This paper describes the implementation process of the RTHS focusing on the controller scheme development. An incremental approach was adopted starting from a controller for the conventional slow pseudodynamic hybrid simulation and evolving to the one applicable for RTHS. Both benchmark-scale and full-scale tests are discussed to provide a roadmap for future RTHS implementation at different laboratories and/or on different structural systems. The developed RTHS controller was applied to study the effect of a rate-dependent energy dissipation device on the seismic performance of a multi-story wood shear wall system. The test specimen, setup, program and results are presented with emphasis given to inter-story drift response. At 100% DBE the RTHS showed that the multi-story shear wall with the damper had 32% less inter-story drift and was noticeably less damaged than its un-damped specimen counterpart.

A Study on Optimization of a Multi-Layered Metallic Disk Array Structure for Shaping of Flat-Topped Element Patterns (구형 빔 패턴 형성을 위한 다층 원형 도체 배열 구조의 최적화 연구)

  • 엄순영;박한규
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.10
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    • pp.985-995
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    • 2003
  • In this paper, a study on optimization of three dimensional multi-layered metallic disk array structure(MDAS) excited by circular waveguides was performed to shape efficient flat-topped element patterns(FTEP) of ${\pm}$20$^{\circ}$ beam width. Each radiating element of the MDAS is composed of input, transition and radiation circular waveguides and finite metal disks stacked on radiation circular waveguide. It has an array structure of a hexagonal lattice appropriate for the conical beam scanning. The analytic algorithm for the MDAS was proposed and the code was also programmed using it. Optimal design parameters of the MDAS were determined through the optimal simulation process to obtain ${\pm}$20$^{\circ}$ FTEP. Also, bandwidth characteristics for FTEP and reflection coefficients of the MDAS were investigated and, as the results, it was shown that the MDAS could shape good FTEPs of ${\pm}$20$^{\circ}$ beam width in main planes at least within a 5.6 % frequency band.

Effects of multi-stacked hybrid encapsulation layers on the electrical characteristics of flexible organic field effect transistors

  • Seol, Yeong-Guk;Heo, Uk;Park, Ji-Su;Lee, Nae-Eung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.257-257
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    • 2010
  • One of the critical issues for applications of flexible organic thin film transistors (OTFTs) for flexible electronic systems is the electrical stabilities of the OTFT devices, including variation of the current on/off ratio ($I_{on}/I_{off}$), leakage current, threshold voltage, and hysteresis, under repetitive mechanical deformation. In particular, repetitive mechanical deformation accelerates the degradation of device performance at the ambient environment. In this work, electrical stabilities of the pentacene organic thin film transistors (OTFTs) employing multi-stack hybrid encapsulation layers were investigated under mechanical cyclic bending. Flexible bottom-gated pentacene-based OTFTs fabricated on flexible polyimide substrate with poly-4-vinyl phenol (PVP) dielectric as a gate dielectric were encapsulated by the plasma-deposited organic layer and atomic layer deposited inorganic layer. For cyclic bending experiment of flexible OTFTs, the devices were cyclically bent up to $10^5$ times with 5mm bending radius. In the most of the devices after $10^5$ times of bending cycles, the off-current of the OTFT with no encapsulation layers was quickly increased due to increases in the conductivity of the pentacene caused by doping effects from $O_2$ and $H_2O$ in the atmosphere, which leads to decrease in the $I_{on}/I_{off}$ and increase in the hysteresis. With encapsulation layers, however, the electrical stabilities of the OTFTs were improved significantly. In particular, the OTFTs with multi-stack hybrid encapsulation layer showed the best electrical stabilities up to the bending cycles of $10^5$ times compared to the devices with single organic encapsulation layer. Changes in electrical properties of cyclically bent OTFTs with encapsulation layers will be discussed in detail.

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The Study on New Radiating Structure with Multi-Layered Two-Dimensional Metallic Disk Array for Shaping flat-Topped Element Pattern (구형 빔 패턴 형성을 위한 다층 이차원 원형 도체 배열을 갖는 새로운 방사 구조에 대한 연구)

  • 엄순영;스코벨레프;전순익;최재익;박한규
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.13 no.7
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    • pp.667-678
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    • 2002
  • In this paper, a new radiating structure with a multi-layered two-dimensional metallic disk array was proposed for shaping the flat-topped element pattern. It is an infinite periodic planar array structure with metallic disks finitely stacked above the radiating circular waveguide apertures. The theoretical analysis was in detail performed using rigid full-wave analysis, and was based on modal representations for the fields in the partial regions of the array structure and for the currents on the metallic disks. The final system of linear algebraic equations was derived using the orthogonal property of vector wave functions, mode-matching method, boundary conditions and Galerkin's method, and also their unknown modal coefficients needed for calculation of the array characteristics were determined by Gauss elimination method. The application of the algorithm was demonstrated in an array design for shaping the flat-topped element patterns of $\pm$20$^{\circ}$ beam width in Ka-band. The optimal design parameters normalized by a wavelength for general applications are presented, which are obtained through optimization process on the basis of simulation and design experience. A Ka-band experimental breadboard with symmetric nineteen elements was fabricated to compare simulation results with experimental results. The metallic disks array structure stacked above the radiating circular waveguide apertures was realized using ion-beam deposition method on thin polymer films. It was shown that the calculated and measured element patterns of the breadboard were in very close agreement within the beam scanning range. The result analysis for side lobe and grating lobe was done, and also a blindness phenomenon was discussed, which may cause by multi-layered metallic disk structure at the broadside. Input VSWR of the breadboard was less than 1.14, and its gains measured at 29.0 GHz. 29.5 GHz and 30 GHz were 10.2 dB, 10.0 dB and 10.7 dB, respectively. The experimental and simulation results showed that the proposed multi-layered metallic disk array structure could shape the efficient flat-topped element pattern.

Optimization of Input Features for Vegetation Classification Based on Random Forest and Sentinel-2 Image (랜덤포레스트와 Sentinel-2를 이용한 식생 분류의 입력특성 최적화)

  • LEE, Seung-Min;JEONG, Jong-Chul
    • Journal of the Korean Association of Geographic Information Studies
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    • v.23 no.4
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    • pp.52-67
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    • 2020
  • Recently, the Arctic has been exposed to snow-covered land due to melting permafrost every year, and the Korea Geographic Information Institute(NGII) provides polar spatial information service by establishing spatial information of the polar region. However, there is a lack of spatial information on vegetation sensitive to climate change. This research used a multi-temporal Sentinel-2 image to perform land cover classification of the Ny-Ålesund in Arctic Svalbard. In the pre-processing step, 10 bands and 6 vegetation spectral index were generated from multi-temporal Sentinel-2 images. In image-classification step is consisted of extracting the vegetation area through 8-class land cover classification and performing the vegetation species classification. The image classification algorithm used Random Forest to evaluate the accuracy and calculate feature importance through Out-Of-Bag(OOB). To identify the advantages of multi- temporary Sentinel-2 for vegetation classification, the overall accuracy was compared according to the number of images stacked and vegetation spectral index. Overall accuracy was 77% when using single-time Sentinel-2 images, but improved to 81% when using multi-time Sentinel-2 images. In addition, the overall accuracy improved to about 83% in learning when the vegetation index was used additionally. The most important spectral variables to distinguish between vegetation classes are located in the Red, Green, and short wave infrared-1(SWIR1). This research can be used as a basic study that optimizes input characteristics in performing the classification of vegetation in the polar regions.

Fabrication of a Thermopneumatic Valveless Micropump with Multi-Stacked PDMS Layers

  • Jeong, Ok-Chan;Jeong, Dae-Jung;Yang, Sang-Sik
    • KIEE International Transactions on Electrophysics and Applications
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    • v.4C no.4
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    • pp.137-141
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    • 2004
  • In this paper, a thermopneumatic PMDS (polydimethlysiloxane) micropump with nozzle/diffuser elements is presented. The micropump is composed of nozzle/diffuser elements as dynamic valves, an actuator consisting of a circular PDMS diaphragm and a Cr/Au heater on a glass substrate. Four PDMS layers are used for fabrication of an actuator chamber, actuator diaphragm by a spin coating process, spacer layer, and nozzle/diffuser by the SU-8 molding process. The radius and thickness of the actuator diaphragm is 2 mm and 30 ${\mu}{\textrm}{m}$, respectively. The length and the conical angle of the nozzle/diffuser elements are 3.5 mm and 20$^{\circ}$, respectively. The actuator diaphragm is driven by the air cavity pressure variation caused by ohmic heating and natural cooling. The flow rate of the micropump in the frequency domain is measured for various duty cycles of the square wave input voltage. When the square wave input voltage of 5 V DC is applied to the heater, the maximum flow rate of the micropump is 44.6 ${mu}ell$/min at 100 Hz with a duty ratio of 80% under the zero pressure difference.