• Title/Summary/Keyword: Multi Chip Module

Search Result 75, Processing Time 0.025 seconds

LTCC기술을 활용한 VCO모듈

  • 이영신;유찬세;이우성;강남기
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.12 no.3
    • /
    • pp.12-24
    • /
    • 2001
  • The key advantage of LTCC(low temperature co-fired ceramics) technology is the ability to integrate passive components such as resistors, capacitors, and inductors. More compact circuits with an increased scale of integration are needed with the development for advanced telecommunication system such as IMT-2000. LTCC technology can be obtained by removing these elements from the substrate surface to inside of ceramic body. And it can miniaturize the wireless phone through integration of planar patch antenna, duplexer, band pass filter, bias line, circuit of impedance matching and RF choke etc. Futhermore, with the multilayer chip process and its outstanding electrical material characteristics, LTCC is predestined for highly-integrated, cost effective wide band applications. This paper focuses on the general description of LTCC MCM technologies and the fabrication of the multilayer VCO module.

  • PDF

A Gridless Area Router for MultiChip Module Design (다중칩 모듈 설계를 위한 GRIDLESS 배선기)

  • 이태선;임종석
    • Proceedings of the IEEK Conference
    • /
    • 1998.10a
    • /
    • pp.1001-1004
    • /
    • 1998
  • In this paper, we present a gridless router for MCMs. Instead of the commonly employed grid a set of comer stitched tiles are used as a routing framework. The router routes variablewidth pins with wires of any width. It also a allows arbitrary location of terminals, wires, and vias. It performs faster than most grid-based MCM routers and produces the routing results which are comparable to their achievements.

  • PDF

FEM MMIC Development based on X-Band GaAs for Satellite Terminals of Phase Array Structure (위상배열구조 위성단말용 X대역 GaAs 기반 FEM MMIC 국산화 개발)

  • Younghoon Kim;Sanghun Lee;Byungchul Park;Sungjin Mun
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.24 no.4
    • /
    • pp.121-127
    • /
    • 2024
  • In this paper, FEM (Front-End Module) MMIC, a key component for the application of the satellite communication terminal transmission and reception module of the multi-phase array structure, was designed and verified as a single chip by designing the Power Amplifier (PA) and the Low Noise Amplifier (LNA). It was manufactured using the GaAs PP10 (100nm) process, a compound semiconductor process from Win-semiconductors, and the operating frequency band of 7.2-10.5GHz operation, output 1W, and noise index of 1.5dB or less were secured using a dedicated test board. The developed FEM MMIC can be used as a single chip, and the components PA and LNA can also be used as each device. The developed device will be used in various applications of Minsu/Gunsu using the X band and the localization of overseas parts.

Compact T/R Module Having Improved T/R Isolation Using a Bias Timing Scheme (바이어스 타이밍 기법을 이용하여 송수신 격리도가 개선된 소형 송수신 모듈)

  • Park, Sung-Kyun;Lee, Hai-Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.23 no.12
    • /
    • pp.1380-1387
    • /
    • 2012
  • The transmit/receive(T/R) module is a key component in the active phased array system. The brick-type T/R module has been widely used and the miniaturization has been an important factor to get the flexibility of the system configuration. For the miniaturization, multi-function chips(MFC) having a common leg configuration are suitable to reduce the number of required MMICs and a high isolation between transmit and receive paths is necessary for the high gain T/R modules. In this work, we propose a bias timing scheme for the compact T/R module and show the optimum timing based on measurements, in order to improve the feed-back path loop problem and the consequent isolation problem of the common leg configuration. We have implemented high power(7 W/channel) and high T/R gain(35 dB transmit and 30 dB receive gains) within the half size($140{\times}80{\times}16mm^3$) of the conventional T/R modules.

A DS-QPSK Chip Design and Fabrication for Home RF Wireless Sensors (홈 RF 무선 센서를 위한 DS-QPSK 모듈의 설계 및 칩 제작)

  • Lee Young-Dong;Lee Won-Ki;Jun Soo-Hyun;Chung Wan-Young
    • Proceedings of the IEEK Conference
    • /
    • 2004.06b
    • /
    • pp.411-414
    • /
    • 2004
  • This paper introduces a modulation method for digital wireless communication based on general DS-QPSK. The design and fabrication is for home networking application to a typical RF transmitter with DS-QPSK modulator. This modulator implemented using VHDL hardware programming language, the fabrication of IC chip $5{\times}5 mm^2$ was carried by 27th IDEC MPW(Multi Project Wafer) process in 0.35${\mu}m$ rule at Samsung Inc. This paper presented the important of this technology for the future application in wireless sensor. This module can be efficient usage for home network to transmit the RF wireless sensor system.

  • PDF

Fabrication and Characterization of Buried Resistor for RF MCM-C (고주파 MCM-C용 내부저항의 제작 및 특성 평가)

  • Cho, H. M.;Lee, W. S.;Lim, W.;Yoo, C. S.;Kang, N. K.;Park, J. C.
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.7 no.1
    • /
    • pp.1-5
    • /
    • 2000
  • Co-fired resistors for high frequency MCM-C (Multi Chip Module-Cofired) were fabricated and measured their RF properties from DC to 6 GHz. LTCC (Low Temperature Co-fired Ceramics) substrates with 8 layers were used as the substrates. Resisters and electrodes were printed on the 7th layer and connected to the top layer by via holes. Deviation from DC resistance of the resistors was resulted from the resister pastes, resistor size, and via length. From the experimental results, the suitable equivalent circuit model was adopted with resistor, transmission line, capacitor, and inductor. The characteristic impedance $Z_{o}$ of the transmission line from the equivalent circuit can explain the RF behavior of the buried resistor according to the structural variation.

  • PDF

Study of On-chip Liquid Cooling in Relation to Micro-channel Design (마이크로 채널 디자인에 따른 온 칩 액체 냉각 연구)

  • Won, Yonghyun;Kim, Sungdong;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.22 no.4
    • /
    • pp.31-36
    • /
    • 2015
  • The demand for multi-functionality, high density, high performance, and miniaturization of IC devices has caused the technology paradigm shift for electronic packaging. So, thermal management of new packaged chips becomes a bottleneck for the performance of next generation devices. Among various thermal solutions such as heat sink, heat spreader, TIM, thermoelectric cooler, etc. on-chip liquid cooling module was investigated in this study. Micro-channel was fabricated on Si wafer using a deep reactive ion etching, and 3 different micro-channel designs (straight MC, serpentine MC, zigzag MC) were formed to evalute the effectiveness of liquid cooling. At the heating temperature of $200^{\circ}C$ and coolant flow rate of 150ml/min, straight MC showed the high temperature differential of ${\sim}44^{\circ}C$ after liquid cooling. The shape of liquid flowing through micro-channel was observed by fluorescence microscope, and the temperarue differential of liquid cooling module was measuremd by IR microscope.

Design to Chip with Multi-Access Memory System and Parallel Processor for 16 Processing Elements of Image Processing Purpose (영상처리용 16개의 처리기를 위한 다중접근기억장치 및 병렬처리기의 칩 설계)

  • Lim, Jae-Ho;Park, Seong-Mi;Park, Jong-Won
    • Journal of Korea Multimedia Society
    • /
    • v.14 no.11
    • /
    • pp.1401-1408
    • /
    • 2011
  • This dissertation present a chip with Multi-Access Memory System(MAMS) and parallel processor for 16 Processing Elements of image processing purpose. MAMS is a kind of parallel access memory system and can simultaneously access to random pixel datas with eight types. It is possible to set a interval about pixel datas to access, too. The parallel processor built-in MAMS actually has been realized in 2003 but its performance fell short of a real time process for high-definition images. I designed a improved parallel processing system by means of addition and expansion of Memory Modules and Processing Elements of previous one. It is feasible to perform a Morphological Closing at the speed of 3 times of the previous one and 6 times of serial system.

Architecture design for speeding up Multi-Access Memory System(MAMS) (Multi-Access Memory System(MAMS)의 속도 향상을 위한 아키텍처 설계)

  • Ko, Kyung-sik;Kim, Jae Hee;Lee, S-Ra-El;Park, Jong Won
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.54 no.6
    • /
    • pp.55-64
    • /
    • 2017
  • High-capacity, high-definition image applications need to process considerable amounts of data at high speed. Accordingly, users of these applications demand a high-speed parallel execution system. To increase the speed of a parallel execution system, Park (2004) proposed a technique, called MAMS (Multi-Access Memory System), to access data in several execution units without the conflict of parallel processing memories. Since then, many studies on MAMS have been conducted, furthering the technique to MAMS-PP16 and MAMS-PP64, among others. As a memory architecture for parallel processing, MAMS must be constructed in one chip; therefore, a method to achieve the identical functionality as the existing MAMS while minimizing the architecture needs to be studied. This study proposes a method of miniaturizing the MAMS architecture in which the architectures of the ACR (Address Calculation and Routing) circuit and MMS (Memory Module Selection) circuit, which deliver data in memories to parallel execution units (PEs), do not use the MMS circuit, but are constructed as one shift and conditional statements whose number is the same as that of memory modules inside the ACR circuit. To verify the performance of the realized architecture, the study conducted the processing time of the proposed MAMS-PP64 through an image correlation test, the results of which demonstrated that the ratio of the image correlation from the proposed architecture was improved by 1.05 on average.

Development of W-band Transceiver Module using Manufactured MMIC (국내개발 MMIC칩을 적용한 W-Band 송수신모듈 개발)

  • Kim, Wan-Sik
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.17 no.2
    • /
    • pp.233-237
    • /
    • 2017
  • The dual-channel receiver MMIC which is composed of LNA, Mixer, LO-amp and temperature compensation circuit is designed on a single chip. For the performance comparison, a FMCW radar transceiver module using commercial MMICs is also implemented. As a result, Multi-channel Transceiver using manufactured MMIC shows an improved performance such as noise figure and gain flatness compare to purchased MMIC.