• Journal of Korea Multimedia Society
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• v.4 no.6
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• pp.570-578
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• 2001

Boundary scan architecture test methodology was introduced to facilitate the testing of complex printed circuit board. The boundary scan architecture has a tremendous potential for real time monitoring of the operational status of a system without interference of normal system operation. In this paper, a new type of embedded controller for real time monitoring of the operational status of a system is proposed and designed by using boundary scan architecture. The proposed real time monitoring embedded controller consists of test access port controller and an embedded controller proposed real time monitoring embedded controller using boundary scan architecture can save the hard-wire resource and can easily interface with boundary scan architecture chip. Experimental results show that the real time monitoring using proposed embedded controller is more effective then the real time monitoring using host computer.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.124-130
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• 2014

In highly reliable and durable systems, failures due to aging might result in catastrophes. Aging monitoring techniques to prevent catastrophes by predicting such a failure are required. This paper presents a scan-based on-line aging monitoring scheme which monitors aging during normal operation and gives an alarm if aging is detected so that the system users take action before a failure occurs. We illustrate our modified scan chain architecture and aging monitoring control method. Experimental results show our simulation results to verify the functions of the proposed scheme.

• Proceedings of the KSRS Conference
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• v.2
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• pp.985-988
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• 2006

Oil spills cause huge material damage. Oil and oil products spills may occur at any stage of the offshore oil production and transportation cycle. Therefore taking into account the current trends of oil production, the task of creating a system for shelf and tank fleet monitoring becomes very crucial today. This document describes the technology being implemented to improve oil spill monitoring and surveillance, to ensure SAR data fast acquisition and processing and to develop geographic information systems in support of spill response decision making. The results of technology implementation are also presented below.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.49 no.12
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• pp.675-682
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• 2000

When a system is composed of multi-boards, an efficient bus arbitration method for the data transfer bus must be provided for guaranteeing proper operations. In this paper, a new test methodology is developed which is used for testing on-line bus arbitration. In the new test methodology, events that are occurred during bus arbitration are defined, and expected signals during fault-free bus arbitration are compared with the signals captured during on-line bus arbitration using boundary-scan cells. For this, a new test architecture is proposed which is efficient for the maintenance and the repair of multi-board systems. In addition, the new methodology can be used with off-line interconnect test using boundary-scan.

• Journal of the Korea Institute of Military Science and Technology
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• v.9 no.3
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• pp.116-122
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• 2006

A fast scan digital-IF FFT receiver at the radio communication band is presented for spectrum monitoring applications. It is composed of three parts: RF front-end, fast LO board, and signal processing board. It has about 19GHz/s scan rate, multi frequency resolution from 10kHz to 2.5kHz, and high sensitivity of below -99dBm. The design and performance analysis of the digital-IF FFT receiver are presented.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.672-675
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• 1997

This paper proposes a structure of the control system for the step & scan exposure tool. The step & scan exposure tool is used for the manufacturing process of the semiconductor DRAM memory of giga bit. The control system employs the VME bus instead of the conventional ISA bus so that all control signals and data can be managed separately by the 4 VME-PCs for fast and fault-free flow of signals for multi-tasking. A high speed I/O card is equipped for the real-time monitoring and control of the sub module equipment. Then all the subsystems are integrated and aligned for the operation of the step & scan exposure tool with the VME bus and, I/O card.

• Proceedings of the KSRS Conference
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• 2003.11a
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• pp.917-919
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• 2003

This paper demonstrates that RADARSAT ScanSAR data can be an important data source of radar remote sensing for monitoring crop systems and estimation of rice yield for large areas in tropic and sub-tropical regions. Experiments were carried out to show the effectiveness of RADARSAT ScanSAR data for rice yield estimation in whole province of Guangdong, South China. A methodology was developed to deal with a series of issues in extracting rice information from the ScanSAR data, such as topographic influences, levels of agro-management, irregular distribution of paddy fields and different rice cropping systems. A model was provided for rice yield estimation based on the relationship between the backscatter coefficient of multi-temporal SAR data and the biomass of rice.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.1
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• pp.71-78
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• 2013

In highly reliable and durable systems, failures due to aging might result in catastrophes. Aging monitoring techniques to prevent catastrophes by predicting such a failure are required. Aging can be monitored by performing a delay test at faster clocks than functional clock in field and checking the current delay state from the test clock frequencies at which the delay test is passed or failed. In this paper, we focus on test clock control scheme for a system-on-chip (SoC) with multiple clock domains. We describe limitations of existing at-speed test clock control methods and present an on-chip faster-than-at-speed test clock control scheme for intra/inter-clock domain test. Experimental results show our simulation results and area analysis. With a simple control scheme, with low area overhead, and without any modification of scan architecture, the proposed method enables faster-than-at-speed test of SoCs with multiple clock domains.

• Proceedings of the KSRS Conference
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• 2007.10a
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• pp.195-198
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• 2007

GOCI(Geostationary Ocean Color Imager) is the core paryload of the geostationary satellite COMS(Communication, Ocean and Meteological Satellite) for ocean monitoring. It is scheduled to be launched at the end of 2008. GOCI observes ocean color around the Korean Peninsula over $2500km{\times}2500km$ area. Whole field of view is divided into 16 solts and scan mechanism enables to point each slot position. Tilted two-axis scan method is used to observe entire field of view with great pointing stability. Vignetting of the optical system appears when the partial obscuration by intermediate optical components occurs. It leads to the variation of the illumination in the image and gradual fading near the edge of the field. It should be prohibited for the stable radiometric performances. In this work, vignetting analysis of GOCI optical system is performed. For the systematic approach, GOCI optical system is divided into scan mechanism part and telescope part. Vignetting analysis of each part is performed and each result is combined for the overall vignetting performances. The analyzed results can be applied to the selection of slot acquisition angle of scan mechanism to minimize vignetting effects.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.7-14
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• 2005

This paper presents a new low power BIST TPG scheme. It uses a transition monitoring window (TMW) that is comprised of a transition monitoring window block and a MUX. When random test patterns are generated by an LFSR, transitions of those patterns satisfy pseudo-random gaussian distribution. The Proposed technique represses transitions of patterns using a k-value which is a standard that is obtained from the distribution of U to observe over transitive patterns causing high power dissipation in a scan chain. Experimental results show that the Proposed BIST TPG schemes can reduce scan transition by about $60\%$ without performance loss in ISCAS'89 benchmark circuits that have large number scan inputs.