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A New Low Power LFSR Architecture using a Transition Monitoring Window  

Kim Youbean (Department of Electrical and Electronic Engineering, Yonsei University)
Yang Myung-Hoon (Department of Electrical and Electronic Engineering, Yonsei University)
Lee Yong (Department of Electrical and Electronic Engineering, Yonsei University)
Park Hyuntae (Department of Electrical and Electronic Engineering, Yonsei University)
Kang Sungho (Department of Electrical and Electronic Engineering, Yonsei University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.42, no.8, 2005 , pp. 7-14 More about this Journal
Abstract
This paper presents a new low power BIST TPG scheme. It uses a transition monitoring window (TMW) that is comprised of a transition monitoring window block and a MUX. When random test patterns are generated by an LFSR, transitions of those patterns satisfy pseudo-random gaussian distribution. The Proposed technique represses transitions of patterns using a k-value which is a standard that is obtained from the distribution of U to observe over transitive patterns causing high power dissipation in a scan chain. Experimental results show that the Proposed BIST TPG schemes can reduce scan transition by about $60\%$ without performance loss in ISCAS'89 benchmark circuits that have large number scan inputs.
Keywords
Low Power; Built-in Self Test(BIST); Pseudo-Random Pattern;
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