• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.10
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• pp.1617-1623
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• 1989

The introduction of the fast Fourier transform(FFT),an efficient computational algorithm for the discrete Fourier transform(DFT) by Cooley and Tukey(1965), has brought to the limelight various other discrete transforms. Some of the analog functions from which these transforms have been derived date back to the early 1920's, for example, Walsh functions (Walsh, 1923) and Hadamard Transform(Enomoto et al, 1965). Fast algorithms developed for the forward transform are equally applicable, exept for minor changes, to the inverse transform. In this paper, we present a simple pipelined Hadamard matrix(HM) which is used to develop a fast algorithm for the Hadamard Processor (HP). The Fast Hadamard Transform(FHT) can be derived using matrix partitioning techniques. The HP system is incorporated through a modular design which permits tailoring to meet a wide range of video data link applications. Emphasis has been placed on a low cost, a low power design suitable for airbone system and video codec.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.741-744
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• 1999

In this paper, We represent a low complexity of parallel canonical basis multiplier for GF( q$^{n}$ ), ( q＞ 2). The Mastrovito multiplier is investigated and applied to multiplication in GF(q$^{n}$ ), GF(q$^{n}$ ) is different with GF(2$^{n}$ ), when MVL is applied to finite field. If q is larger than 2, inverse should be considered. Optimized irreducible polynomial can reduce number of operation. In this paper we describe a method for choosing optimized irreducible polynomial and modularizing recursive polynomial operation. A optimized irreducible polynomial is provided which perform modulo reduction with low complexity. As a result, multiplier for fields GF(q$^{n}$ ) with low gate counts. and low delays are constructed. The architectures are highly modular and thus well suited for VLSI implementation.

• Journal of the Korean Society for Nondestructive Testing
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• v.28 no.1
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• pp.54-58
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• 2008

Time reversal (TR) of body waves in fluids and isotropic solids has been used in many applications including ultrasonic NDE. However, the study of the TR method for anisotropic materials is not well established. In this paper, the full reconstruction of the input signal is investigated for anisotropic media using an analytical formulation, called a modular Gaussian beam (MGB) model. The time reversal operation of this model in the frequency domain is done by taking the complex conjugate of the Gaussian amplitude and phase received at the TR mirror position. A narrowband reference signal having a particular frequency and number of cycles is then multiplied and the whole signal is inverse Fourier transformed. The original input signal is seen to be fully restored by the TR process of MGB model and this model can be more generalized to simulate the spatial and temporal focusing effects due to TR process in anisotropic materials.

• East Asian mathematical journal
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• v.35 no.3
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• pp.285-288
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• 2019

Let $F_n$, $n{\in}{\mathbb{N}}$ be the n - th Fibonacci number, and let (p, q) be one of ordered pairs ($F_{n+2}$, $F_n$) or ($F_{n+1}$, $F_n$). Then we show that the multiplicative inverse of q mod p as well as that of p mod q are again Fibonacci numbers. For proof of our claim we make use of well-known Cassini, Catlan and dOcagne identities. As an application, we determine the number $N_{p,q}$ of nonzero term of a polynomial ${\Delta}_{p,q}(t)=\frac{(t^{pq}-1)(t-1)}{(t^p-1)(t^q-1)}$ through the Carlitz's formula.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.12
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• pp.1609-1617
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• 2019

Described in this paper is a design of hardware accelerator for implementing public-key cryptographic protocols (PKCPs) based on Elliptic Curve Cryptography (ECC) and RSA. It supports five elliptic curves (ECs) over GF(p) and three key lengths of RSA that are defined by NIST standard. It was designed to support four point operations over ECs and six modular arithmetic operations, making it suitable for hardware implementation of ECC- and RSA-based PKCPs. In order to achieve small-area implementation, a finite field arithmetic circuit was designed with 32-bit data-path, and it adopted word-based Montgomery multiplication algorithm, the Jacobian coordinate system for EC point operations, and the Fermat's little theorem for modular multiplicative inverse. The hardware operation was verified with FPGA device by implementing EC-DH key exchange protocol and RSA operations. It occupied 20,800 gate equivalents and 28 kbits of RAM at 50 MHz clock frequency with 180-nm CMOS cell library, and 1,503 slices and 2 BRAMs in Virtex-5 FPGA device.

• The KIPS Transactions:PartA
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• v.9A no.3
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• pp.271-280
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• 2002

In this paper, the input-output interconnection method of the multiple-valued signal processing circuit using Perfect Shuffle technique and Kronecker product is discussed. Using this method, the circuit design method of the multiple-valued Reed-Muller Expansions (MRME) which can process the multiple-valued signal easily on finite fields GF$(p^m)$ is presented. The proposed input-output interconnection methods show that the matrix transform is an efficient and the structures are modular. The circuits of multiple-valued signal processing of MRME on GF$(p^m)$ design the basic cells to implement the transform and inverse transform matrix of MRME by using two basic gates on GF(3) and interconnect these cells by the input-output interconnection technique of the multiple-valued signal processing circuits. The proposed multiple-valued signal processing circuits that are simple and regular for wire routing and possess the properties of concurrency and modularity are suitable for VLSI.