• 마이크로전자및패키징학회지
• /
• 제22권2호
• /
• pp.55-59
• /
• 2015

Novel low-volume solder-on-pad (SoP) process is proposed for a fine pitch Cu pillar bump interconnection. A novel solder bumping material (SBM) has been developed for the $60{\mu}m$ pitch SoP using screen printing process. SBM, which is composed of ternary Sn-3.0Ag-0.5Cu (SAC305) solder powder and a polymer resin, is a paste material to perform a fine-pitch SoP in place of the electroplating process. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder; the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. The Si chip and substrate with daisy-chain pattern are fabricated to develop the fine pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si substrate has 6724 under bump metallization (UBM) with a $45{\mu}m$ diameter and $60{\mu}m$ pitch. The Si chip with Cu pillar bump is flip chip bonded with the SoP formed substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of underfill. The optimized interconnection process has been validated by the electrical characterization of the daisy-chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and micro bump interconnection using a screen printing process.

• 한국표면공학회:학술대회논문집
• /
• 한국표면공학회 2018년도 춘계학술대회 논문집
• /
• pp.102-102
• /
• 2018

Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).

• 해양환경안전학회:학술대회논문집
• /
• 해양환경안전학회 2005년도 추계학술대회지
• /
• pp.197-202
• /
• 2005

일반적으로 수 마이크로 단위로 계측되는 반도체의 검사 정밀도를 높이기 위해서는 라인스캔 카메라가 이용된다. 그러나 불량 검사는 스캔속도와 조명조건에 매우 민감하기 때문에 정확한 경계 검출 알고리즘이 필요하다. 본 논문에서는 반도체 칩의 범프 불량 검출의 정확성을 높이기 위해서 서브픽셀을 적용한 경계 검출을 제안하였다. 범프 에지는 범프 중심점에서 네 방향으로 1차 도함수에 의해서 검출되고 서브픽셀 방법으로 정확한 에지 위치를 찾는다. 그리고 범프 돌기, 범프 브리지, 범프 변색에 의해 범프 크기가 변할 수 있기 때문에 에러를 최소화하기 위해서 최소자승법을 이용하여 정확한 범프 경계를 구한다. 실험 결과 제안된 방법은 기존의 다른 경계 검출 알고리즘에 비하여 커다란 성능향상을 보였다.

• 한국정보통신학회논문지
• /
• 제11권4호
• /
• pp.793-799
• /
• 2007

제안된 방법은 다른 이미지 서브트랙션 방법에 대하여 커다란 성능향상을 보임을 일련의 실험들을 통하여 보여준다. 일반적으로 수 마이크로 단위로 계측되는 반도체의 검사 정밀도를 높이기 위해서는 라인스캔 카메라가 이용된다. 그러나 불량 검사는 스캔속도와 조명조건에 매우 민감하기 때문에 정확한 경계검출 알고리즘이 필요하다. 본 논문에서는 반도체 칩의 범프 불량 검출의 정확성을 높이기 위해서 서브픽셀을 적용한 경계 검출을 제안하였다. 범프 에지는 범프 중심점에서 네 방향으로 1차 도함수에 의해서 검출되고 서브픽셀 방법으로 정확한 에지 위치를 찾는다. 그리고 범프 돌기, 범프 브리지, 범프 변색에 의해 범프 크기 가 변할 수 있기 때문에 에러를 최소화 하기 위해서 최소자승법을 이용하여 정확한 범프 경계를 구한다. 실험 결과 제안된 방법은 기존의 다른 경계 검출 알고리즘에 비하여 커다란 성능향상을 보였다.

• 대한금속재료학회지
• /
• 제49권5호
• /
• pp.411-418
• /
• 2011

The current study investigates the electroplating characteristics of Sn-Cu eutectic micro-bumps electroplated on a Si chip for flip chip application. Under bump metallization (UBM) layers consisting of Cr, Cu, Ni and Au sequentially from bottom to top with the aim of achieving Sn-Cu bumps $10\times10\times6$ ${\mu}m$ in size, with 20${\mu}m$ pitch. In order to determine optimal plating parameters, the polarization curve, current density and plating time were analyzed. Experimental results showed the equilibrium potential from the Sn-Cu polarization curve is -0.465 V, which is attained when Sn-Cu electro-deposition occurred. The thickness of the electroplated bumps increased with rising current density and plating time up to 20 mA/$cm^2$ and 30 min respectively. The near eutectic composition of the Sn-0.72wt%Cu bump was obtained by plating at 10 mA/$cm^2$ for 20 min, and the bump size at these conditions was $10\times10\times6$ ${\mu}m$. The shear strength of the eutectic Sn-Cu bump was 9.0 gf when the shearing tip height was 50% of the bump height.

• 한국재료학회지
• /
• 제20권1호
• /
• pp.19-24
• /
• 2010

The current study examined Ag migration from the Ag paste bump in the SABiT technology-applied PCB. A series of experiments were performed to measure the existence/non-existence of Ag in the insulating prepreg region. The average grain size of Ag paste was 30 nm according to X-ray diffraction (XRD) measurement. Conventional XRD showed limitations in finding a small amount of Ag in the prepreg region. The surface morphology and cross section view in the Cu line-Ag paste bump-Cu line structure were observed using a field emission scanning electron microscope (FE-SEM). The amount of Ag as a function of distance from the edge of Ag paste bump was obtained by FE-SEM with energy dispersive spectroscopy (EDS). We used an electron probe micro analyzer (EPMA) to improve the detecting resolution of Ag content and achieved the Ag distribution function as a function of the distance from the edge of the Ag paste bump. The same method with EPMA was applied for Cu filled via instead of Ag paste bump. We compared the distribution function of Ag and Cu, obtained from EPMA, and concluded that there was no considerable Ag migration effect for the SABiT technology-applied printed circuit board (PCB).

• 한국재료학회지
• /
• 제18권3호
• /
• pp.117-122
• /
• 2008

Micro-sized bumps on a multi-layered build-up PCB were fabricated by pulse-reverse copper electroplating. The values of the current density and brightener content for the electroplating were optimized for suitable performance with maximum efficiency. The micro-bumps thus electroplated were characterized using a range of analytical tools that included an optical microscope, a scanning electron microscope, an atomic force microscope and a hydraulic bulge tester. The optical microscope and scanning electron microscope analyses results showed that the uniformity of the electroplating was viable in the current density range of $2-4\;A/dm^2$; however, the uniformity was slightly degraded as the current density increased. To study the effect of the brightener concentration, the concentration was varied from zero to 1.2 ml/L. The optimum concentration for micro-bump electroplating was found to be 0.6 ml/L based on an examination of the electroplating properties, including the roughness, yield strength and grain size.

• 마이크로전자및패키징학회지
• /
• 제21권2호
• /
• pp.37-41
• /
• 2014

차세대 전자 소자 기술에서 전력전달은 소자의 전력을 낮추고 발열로 인한 문제 해결을 위해서 매우 중요한 기술로 대두되고 있다. 본 연구에서는 직사각형 ABL 전력 범프를 이용한, Cu-to-Cu 플립 칩 본딩 공정의 신뢰성 문제에 대해 살펴보았다. 다이 내 범프 높이 차이는 전기도금 후 CMP 공정을 진행했을 경우 약 $0.3{\sim}0.5{\mu}m$ 이었고, CMP 공정을 진행하지 않았을 경우는 약 $1.1{\sim}1.4{\mu}m$으로 나타났다. 또한 면적이 큰 ABL 전력 범프가 입출력 범프 보다 높이가 높게 나타났다. 다이 내 범프 높이 차이로 인해 플립 칩 본딩 공정 시 misalignment 문제가 발생하였고, 이는 본딩 quality 에도 영향을 미쳤다. Cu-to-Cu 플립 칩 공정을 위해선 다이 내 범프 높이 균일도와 Cu 범프의 평탄도 조절이 매우 중요한 요소라 하겠다.

• 마이크로전자및패키징학회지
• /
• 제9권1호
• /
• pp.35-41
• /
• 2002

솔더 범프를 이용한 플립 칩 접속 기술은 시스템의 고속화, 고집적화, 소형화 요구 덴 마이크로 일렉트로닉스의 성능은 향상시키기 위해 필요한 기술이다. 본연구 에서는 Cr/Cr-Cu/cu UBM 구조에서 고 용융점 솔더 범프와 저 용융점 솔더 범프를-시효처리 후 전단 강도를 평가하였다. 계면에서 관찰된 금속간 화합물의 성장과 접합상태를 SEM과 TEM으로 분석하였으며, 유한요소법을 통하여 전단하중을 적용하였을때 집중되는 응력을 해석하였다. 실험결과 Sn-97wt%Pb와 Sn-37wt%Pb에서 900시간 시효 처리된 시편의 전단강도는 최대 값에서 각각 25%, 20% 감소하였다. 시효처리를 통해 금속간화합물인 $Cu_6/Sn_5$와 $Cu_3Sn$의 성장을 확인하였으며, 파단 경로는 초기의 솔더 내부에서 IMC층의 계면으로 이동하는 경향을 알 수 있었다.

• 한국자기학회:학술대회 개요집
• /
• 한국자기학회 2000년도 춘계연구발표회 논문개요집
• /
• pp.138-139
• /
• 2000