• Title/Summary/Keyword: Metallization

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Effects of lead metal and annealing methods on low resistance contact formation of polycrystalline CdTe thin film (다결정 CdTe박막의 저저항 접축을 위한 배선금속 및 열처리방법의 효과에 관한 연구)

  • 김현수;이주훈;염근영
    • Electrical & Electronic Materials
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    • v.8 no.5
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    • pp.619-625
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    • 1995
  • Polycrystalline CdTe thin film has been studied for photovoltaic application due to the 1.45 eV band gap energy ideal for solar energy conversion and high absorption coefficient. The formation of low resistance contact to p-CdTe is difficult because of large work function(>5.5eV). Common methods for ohmic contact to p-CdTe are to form a p+ region under the contact by in-diffusion of contact material to reduce the barrier height and modify a p-CdTe surface layer using chemical treatment. In this study, the surface chemical treatment of p CdTe was carried out by H$\_$3/PO$\_$4/+HNO$\_$3/ or K$\_$2/Cr$\_$2/O$\_$7/+H$\_$2/SO$\_$4/ solution to provide a Te-rich surface. And various thin film contact materials such as Cu, Au, and Cu/Au were deposited by E-beam evaporation to form ohmic contact to p-CdTe. After the metallization, post annealing was performed by oven heat treatment at 150.deg. C or by RTA(Rapid Thermal Annealing) at 250-350.deg. C. Surface chemical treatments of p-CdTe thin film improved metal/p-CdTe interface properties and post heat treatment resulted in low contact resistivity to p-CdTe.Of the various contact metal, Cu/Au and Cu show low contact resistance after oven and RTA post-heat treatments, respectively.

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Effects of Intermetallic Compounds Formed during Flip Chip Process on the Interfacial Reactions and Bonding Characteristics (플립칩 공정시 반응생성물이 계면반응 및 접합특성에 미치는 영향)

  • Ha, Jun-Seok;Jung, Jae-Pil;Oh, Tae-Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.2
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    • pp.35-39
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    • 2012
  • We studied interfacial reaction and bonding characteristics of a flip chip bonding with the viewpoint of formation behavior of intermetallic compounds. For this purpose, Sn-0.7Cu and Sn-3Cu solders were reflowed on the Al/Cu and Al/Ni UBMs. When Sn-0.7Cu was reflowed on the Al/Cu UBM, no intermetallic compounds were formed at the solder/UBM interface. The $Cu_6Sn_5$ intermetallic compounds formed by reflowing Sn-3Cu solder on the Al/Cu UBM were spalled from the interface, resulting in delamination of the solder/UBM interface. On the other hand, the $(Cu,Ni)_6Sn_5$ intermetallic compounds were formed by reflowing of Sn-0.7Cu and Sn-3Cu on the Al/Ni UBM and the interfacial bonding between the Sn-Cu solders and the Al/Ni UBM was kept stable.

Efficiency Improvement in Screen-printed Crystalline Silicon Solar Cell with Light Induced Plating (광유도도금을 이용한 스크린 프린팅 결정질 실리콘 태양전지의 효율 향상)

  • Jeong, Myeong Sang;Kang, Min Gu;Chang, Hyo Sik;Song, Hee-Eun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.3
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    • pp.246-251
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    • 2013
  • Screen printing is commonly used to form the front/back electrodes in silicon solar cell. But it has caused high resistance and low aspect ratio, resulting in decreased conversion efficiency in solar cell. Recently the plating method has been combined with screen-printed c-Si solar cell to reduce the resistance and improve the aspect ratio. In this paper, we investigated the effect of light induced silver plating with screen-printed c-Si solar cells and compared their electrical properties. All wafers were textured, doped, and coated with anti-reflection layer. The metallization process was carried out with screen-printing, followed by co-fired. Then we performed light induced Ag plating by changing the plating time in the range of 20 sec~5min with/without external light. For comparison, we measured the light I-V characteristics and electrode width by optical microscope. During plating, silver ions fill the porous structure established in rapid silver particle sintering during co-firing step, which results in resistance decrease and efficiency improvement. The plating rate was increased in presence of light lamp, resulting in widening the electrode with and reducing the short-circuit current by shadowing loss. With the optimized plating condition, the conversion efficiency of solar cells was increased by 0.4% due to decreased series resistance. Finally we obtained the short-circuit current of 8.66 A, open-circuit voltage of 0.632 V, fill factor of 78.2%, and efficiency of 17.8% on a silicon solar cell.

Study of Post-silicidation Annealing Effect on SOI Substrate (SOI 기판에서 Silicide의 후속 공정 열처리 영향에 대한 연구)

  • Lee, Won-Jae;Oh, Soon-Young;Kim, Yong-Jin;Zhang, Ying-Ying;Zhong, Zhun;Lee, Shi-Guang;Jung, Soon-Yen;Kim, Yeong-Cheol;Wang, Jin-Suk;Lee, Hi-Deok
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.3-4
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    • 2006
  • In this paper, a nickel silicide technology with post-silicidation annealing effect for thin film SOI devices is investigated in detail. Although lower resistivity Ni silicide can be easily obtained at low forming temperature, poor thermal stability and changing of characteristic are serious problems during the post silicidation annealing like ILD (Inter Layer Dielectric) deposition or metallization. So these effects are observed as deposited Ni thickness differently on As doped SOI (Si film 30nm). Especially, the sheet resistance of Ni thickness deposited 20nm was lower than 30nm before the post silicidation annealing. But after the post silicidation annealing, the sheet resistance was changed. Therefore, in thin film SOI MOSFETs or Ni-FUSI technology that the Si film is less than 50nm, it is important to decide the thickness of deposited Ni in order to avoid forming high resistivity silicide.

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Evaluation of Al CMP Slurry based on Abrasives for Next Generation Metal Line Fabrication (연마제 특성에 따른 차세대 금속배선용 Al CMP (chemical mechanical planarization) 슬러리 평가)

  • Cha, Nam-Goo;Kang, Young-Jae;Kim, In-Kwon;Kim, Kyu-Chae;Park, Jin-Goo
    • Korean Journal of Materials Research
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    • v.16 no.12
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    • pp.731-738
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    • 2006
  • It is seriously considered using Al CMP (chemical mechanical planarization) process for the next generation 45 nm Al wiring process. Al CMP is known that it has a possibility of reducing process time and steps comparing with conventional RIE (reactive ion etching) method. Also, it is more cost effective than Cu CMP and better electrical conductivity than W via process. In this study, we investigated 4 different kinds of slurries based on abrasives for reducing scratches which contributed to make defects in Al CMP. The abrasives used in this experiment were alumina, fumed silica, alkaline colloidal silica, and acidic colloidal silica. Al CMP process was conducted as functions of abrasive contents, $H_3PO_4$ contents and pressures to find out the optimized parameters and conditions. Al removal rates were slowed over 2 wt% of slurry contents in all types of slurries. The removal rates of alumina and fumed silica slurries were increased by phosphoric acid but acidic colloidal slurry was slightly increased at 2 vol% and soon decreased. The excessive addition of phosphoric acid affected the particle size distributions and increased scratches. Polishing pressure increased not only the removal rate but also the surface scratches. Acidic colloidal silica slurry showed the highest removal rate and the lowest roughness values among the 4 different slurry types.

The Investigation of Ni Thin Film by Atomic Layer Deposition

  • Do K. W.;Yang C. M.;Kang I. S.;Kim K. M.;Back K. H.;Cho H. I.;Lee H. B.;Kong S. H.;Hahm S. H.;Kwon D. H.;Lee J. H.;Lee J. H.
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2005.09a
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    • pp.193-196
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    • 2005
  • Low resistance Ni thin films for using NiSi formation and metallization by atomic layer deposition (ALD) method have been studied. ALD temperature window is formed between $200^{\circ}C\;and\;250^{\circ}C$ with deposition rate of $1.25{\AA}$/cycle. The minimum resistance of deposited Ni films shows $4.333\;{\Omega}/\square$ on the $SiO_2/Si$ substrate by $H_2$ direct purging process. The reason of showing the low resistance is believed to be due to format ion of the $Ni_3C$ phase by residual carbon in Bis-Ni The deposited film exhibits excellent step coverage in the trench having 1(100 nm) : 16 (1.6 um) aspect ratio.

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Interfacial Reaction and Mechanical Property of BGA Solder Joints with LTCC Substrate (LTCC기판과 BGA 솔더접합부의 계면반응 및 기계적 특성)

  • Yoo, Choong-Sik;Ha, Sang-Su;Kim, Bae-Kyun;Jang, Jin-Kyu;Seo, Won-Chan;Jung, Seung-Boo
    • Korean Journal of Metals and Materials
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    • v.47 no.3
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    • pp.202-208
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    • 2009
  • The effects of aging time on the microstructure and shear strength of the Low Temperature Co-fired Ceramic (LTCC)/Ag pad/Electroless Nickel Immersion Gold (ENIG)/BGA solder joints were investigated through isothermal aging at $150^{\circ}C$ for 1000 h with conventional Sn-37Pb and Sn-3Ag-0.5Cu. $Ni_3Sn_4$ intermetallic compound (IMC) layers was formed at the interface between Sn-37Pb solder and LTCC substrate as-reflowed state, while $(Ni,Cu)_3Sn_4$ IMC layer was formed between Sn-3Ag-0.5Cu solder and LTCC substrate. Additional $(Cu,Ni)_6Sn_5$ layer was found at the interface between the $(Ni,Cu)_3Sn_4$ layer and Sn-3Ag-0.5Cu solder after aging at $150^{\circ}C$ for 500 h. Thickness of the IMC layers increased and coarsened with increasing aging time. Shear strength of both solder joints increased with increasing aging time. Failure mode of BGA solder joints with LTCC substrate after shear testing revealed that shear strength of the joints depended on the adhesion between Ag metallization and LTCC. Fracture mechanism of Sn-37Pb solder joint was a mixture of ductile and pad lift, while that of Sn-3Ag-0.5Cu solder joint was a mixture of ductile and brittle $(Ni,Cu)_3Sn_4$ IMC fracture morphology. Failure mechanisms of LTCC/Ag pad/ENIG/BGA solder joints were also interpreted by finite element analyses.

Fabrication and Characteristics of Electroplated Sn-0.7Cu Micro-bumps for Flip-Chip Packaging (플립칩 패키징용 Sn-0.7Cu 전해도금 초미세 솔더 범프의 제조와 특성)

  • Roh, Myong-Hoon;Lee, Hea-Yeol;Kim, Wonjoong;Jung, Jae Pil
    • Korean Journal of Metals and Materials
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    • v.49 no.5
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    • pp.411-418
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    • 2011
  • The current study investigates the electroplating characteristics of Sn-Cu eutectic micro-bumps electroplated on a Si chip for flip chip application. Under bump metallization (UBM) layers consisting of Cr, Cu, Ni and Au sequentially from bottom to top with the aim of achieving Sn-Cu bumps $10\times10\times6$ ${\mu}m$ in size, with 20${\mu}m$ pitch. In order to determine optimal plating parameters, the polarization curve, current density and plating time were analyzed. Experimental results showed the equilibrium potential from the Sn-Cu polarization curve is -0.465 V, which is attained when Sn-Cu electro-deposition occurred. The thickness of the electroplated bumps increased with rising current density and plating time up to 20 mA/$cm^2$ and 30 min respectively. The near eutectic composition of the Sn-0.72wt%Cu bump was obtained by plating at 10 mA/$cm^2$ for 20 min, and the bump size at these conditions was $10\times10\times6$ ${\mu}m$. The shear strength of the eutectic Sn-Cu bump was 9.0 gf when the shearing tip height was 50% of the bump height.

Effect of Metal Mask Screen on Metal-induced Recombination Current and Solar Cell Characteristics (금속 마스크 스크린이 금속 재결합 전류와 태양전지 특성에 미치는 영향)

  • Lee, Uk Chul;Jeong, Myeong Sang;Lee, Joon Sung;Song, Hee-eun;Kang, Min Gu;Park, Sungeun;Chang, Hyo Sik;Lee, Sang Hee
    • Current Photovoltaic Research
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    • v.9 no.1
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    • pp.6-10
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    • 2021
  • The mesh mask screen, which is generally used for screen printing metallization of silicon solar cell, requires high squeegee pressure and low printing speed. These requirements are acting as a limiting factor in production yield in photovoltaic industries. In order to improve the productivity, a metal mask, which has high durability and high printing speed, has been researched. In this paper, the characteristics of each solar cell, in which electrodes were formed by using a metal mask and a mesh mask, were analyzed through recombination current density. In particular, the metal-induced recombination current density (Jom) representing the recombination of the emitter-metal interface was calculated using the shading method, and the resulting efficiency and open-circuit voltage were analyzed through the diode equation. As a result of analyzing the proportion of the metal-induced recombination current density to the total emitter recombination current density, it was analyzed that the reduction of the metal-induced recombination current density through the metal mask is an important factor in reducing the total recombination current density of the solar cell.

Study on the Interfacial Reactions between Gallium and Cu/Au Multi-layer Metallization (갈륨과 Cu/Au 금속층과의 계면반응 연구)

  • Bae, Junhyuk;Sohn, Yoonchul
    • Journal of the Microelectronics and Packaging Society
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    • v.29 no.2
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    • pp.73-79
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    • 2022
  • In this study, a reaction study between Ga, which has recently been spotlighted as a low-temperature bonding material, and Cu, a representative electrode material, was conducted to investigate information necessary for low-temperature soldering applications. Interfacial reaction and intermetallic compound (IMC) growth were observed and analyzed by reacting Ga and Cu/Au substrates in the temperature range of 80-200℃. The main IMC growing at the reaction interface was CuGa2 phase, and AuGa2 IMC with small particle sizes was formed on the upper part and Cu9Ga4 IMC with a thin band shape on the lower part of the CuGa2 layer. CuGa2 particles showed a scallop shape, and the particle size increased without significant shape change as the reaction time increased, similar to the case of Cu6Sn5 growth. As a result of analyzing the CuGa2 growth mechanism, the time exponent was calculated to be ~3.0 in the temperature range of 120-200℃, and the activation energy was measured to be 17.7 kJ/mol.