• 전기전자학회논문지
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• 제15권2호
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• pp.143-148
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• 2011

MOS (Metal-Oxide Semconductor) devices among the most sensistive of all semiconductors to radiation, in particular ionizing radiation, showing much change even after a relatively low dose. The necessity of a radiation dosimeter robust enough for the working environment has increased in the fields of aerospace, radio-therapy, atomic power plant facilities, and other places where radiation exists. The power MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor) has been tested for use as a gamma radiation dosimeter by measuring the variation of threshold voltage based on the quantity of dose, and a maximum total dose of 30 krad exposed to a $^{60}Co$ ${\gamma}$-radiation source, which is sensitive to environment parameters such as temperature. The gate oxide structures give the main influence on the changes in the electrical characteristics affected by irradiation. The variation of threshold voltage on the operating temperature has caused errors, and needs calibration. These effects can be overcome by adjusting gate oxide thickness and implanting impurity at the surface of well region in MOSFET.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2009년도 정보 및 제어 심포지움 논문집
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• pp.159-162
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• 2009

The necessity of radiation dosimeter with precise measurement of radiation dose is increased and required in the field of spacecraft, radiotheraphy hospital, atomic plant facility, etc. where radiation exists. Until now, a low power commercial metal-oxide semiconductor(MOS) transistor has been tested as a gamma radiation dosimeter. The measurement error between the actual value and the measurement one can occur since the MOSFET(MOS field-effect transistor) dosimeter, which is now being used, has two gates with same width. The measurement value of dosimeter depends on the variation of threshold voltage, which can be affected by the environment such as temperature. In this paper, a radiation dosimeter having a pair of MOSFET is designed in the same silicon substrate, in which each of the MOSFETs is operable in a bias mode and a test mode. It can measure the radiation dose by the difference between the threshold voltages regardless of the variation of temperature.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2009년도 춘계학술대회 논문집
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• pp.1943-1950
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• 2009

The development of high voltage Insulated Gate Bipolar Transistor (IGBT) have given new device advantage in the areas where they compete with conventional GTO (Gate Turnoff Thyristor) technology. The IGBT combines the advantages of a power MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor) and a bipolar power transistor. The change of electrical characteristics for IGBT is mainly coming from the change of characteristics of MOSFET at the input gate and the PNP transistors at the output. The gate oxide structure gives the main influence on the changes in the electrical characteristics affected by environments such as radiation and temperature, etc.. The change of threshold voltage, which is one of the important design parameters, is brought by charge trapping at the gate oxide. In this paper, the electrical characteristics are simulated by SPICE simulation, and the parameters are found to design optimized circuits.

• Transactions on Electrical and Electronic Materials
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• 제12권3호
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• pp.93-97
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• 2011

In this paper, we discuss design considerations for an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a lateral asymmetric channel (LAC) doping profile. We employed a 0.35 ${\mu}M$ standard complementary MOSFET process for fabrication of the devices. The gates to the LAC doping overlap lengths were 0.5, 1.0, and 1.5 ${\mu}M$. The drain current ($I_{ON}$), transconductance ($g_m$), substrate current ($I_{SUB}$), drain to source leakage current ($I_{OFF}$), and channel-hot-electron (CHE) reliability characteristics were taken into account for optimum device design. The LAC devices with shorter overlap lengths demonstrated improved $I_{ON}$ and $g_m$ characteristics. On the other hand, the LAC devices with longer overlap lengths demonstrated improved CHE degradation and $I_{OFF}$ characteristics.

• 한국철도학회논문집
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• 제14권5호
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• pp.411-415
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• 2011

DC/DC컨버터는 임의의 직류전원을 부하가 요구하는 형태의 직류전원으로 변환시키는 전력변환기이다. 전압모드 DC/DC 컨버터는 주기적으로 입력측에서 출력측으로 전달되는 에너지를 제어하는 기능을 수행하기 위해 MOSFET(산화물-반도체 전계 효과 트랜지스터), 인덕터, PWM 제어기(오실레이터, 연산증폭기, 비교기로 구성)를 이용한다. 본 논문에서 PWM(펄스폭 변조) 모듈과 스위칭모드로 제어하는 기본적인 승압과 강압컨버터를 연구하고, 전기적 특성을 SPICE로 시뮬레이션을 수행하며, 전력의 효율을 각 소자의 변화와 사양에 따라 분석하는데 있다.

• 한국전기전자재료학회논문지
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• 제31권2호
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• pp.74-79
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• 2018

In this report, the results of a systematic study on the effects of polycrystalline silicon gate depletion on the reliability characteristics of metal-oxide semiconductor field-effect transistor (MOSFET) devices were discussed. The devices were fabricated using standard complimentary metal-oxide semiconductor (CMOS) processes, wherein phosphorus ion implantation with implant doses varying from $10^{13}$ to $5{\times}10^{15}cm^{-2}$ was performed to dope the polycrystalline silicon gate layer. For implant doses of $10^{14}/cm^2$ or less, the threshold voltage was increased with the formation of a depletion layer in the polycrystalline silicon gate layer. The gate-depletion effect was more pronounced for shorter channel lengths, like the narrow-width effect, which indicated that the gate-depletion effect could be used to solve the short-channel effect. In addition, the hot-carrier effects were significantly reduced for implant doses of $10^{14}/cm^2$ or less, which was attributed to the decreased gate current under the gate-depletion effects.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권1호
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• pp.32-40
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• 2004

An extension of the density-gradient model to include the non-local transport effect is presented. The governing equations can be derived from the first three moments of the Wigner distribution function with some approximations. A new nonlinear discretization scheme is applied to the model to reduce the discretization error. We also developed a new boundary condition for the $Si/SiO_2$ interface that includes the electron wavefunction penetration into the oxide to obtain more accurate C-V characteristics. We report the simulation results of a 25-nm metal-oxide-semiconductor field-effect transistor (MOSFET) device.

• EDISON SW 활용 경진대회 논문집
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• 제6회(2017년)
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• pp.428-432
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• 2017

Silicon 기반 Metal-oxide-semiconductor field-effect transistor (MOSFET)의 크기가 감소함에 따라 silicon자체의 물성적 한계가 나타나고 있다. 이를 극복하고자 III-V 화합물 반도체가 채널소자로서 각광받고 있다. 본 연구에서는 III-V 화합물반도체 중 $In_xGa_{1-x}As$는 Indium 조성에 따른 전자구조 및 n-type MOSFET의 소자 특성을 본다. Indium의 조성이 증가함에 따라 subband의 개수와 간격이 증가하게 되어 Density of state가 감소하게 된다. 이로 인하여 Indium의 조성이 증가함에 따라 $In_xGa_{1-x}As$ 채널 MOSFET에서 상대적으로 Fermi level을 더 많이 상승시키게 되어 potential barrier를 얇아지게 만들며 또한 에너지에 따른 전류 밀도를 넓게 분포하도록 만든다. 이로 인하여 단채널에서는 In 조성이 증가함에 따라 direct source-to-drain tunnelling current이 증가하게 된다. 이로 인하여 In 조성의 증가에 따라 subthreshold swing과 ON-state current가 저하된다.

• 센서학회지
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• 제27권3호
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• pp.160-164
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• 2018

In this paper, a wide dynamic range complementary metal-oxide-semiconductor (CMOS) image sensor with the adjustable sensitivity by using cascode metal-oxide-semiconductor field-effect transistor (MOSFET) and inverter is proposed. The characteristics of the CMOS image sensor were analyzed through experimental results. The proposed active pixel sensor consists of eight transistors operated under various light intensity conditions. The cascode MOSFET is operated as the constant current source. The current generated from the cascode MOSFET varies with the light intensity. The proposed CMOS image sensor has wide dynamic range under the high illumination owing to logarithmic response to the light intensity. In the proposed active pixel sensor, a CMOS inverter is added. The role of the CMOS inverter is to determine either the conventional mode or the wide dynamic range mode. The cascode MOSFET let the current flow the current if the CMOS inverter is turned on. The number of pixels is $140(H){\times}180(V)$ and the CMOS image sensor architecture is composed of a pixel array, multiplexer (MUX), shift registers, and biasing circuits. The sensor was fabricated using $0.35{\mu}m$ 2-poly 4-metal CMOS standard process.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권2호
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• pp.139-145
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• 2014

Control of threshold voltage ($V_T$) by ground-plane (GP) technique for planar tunnel field-effect transistor (TFET) is studied for the first time using TCAD simulation method. Although GP technique appears to be similarly useful for the TFET as for the metal-oxide-semiconductor field-effect transistor (MOSFET), some unique behaviors such as the small controllability under weak ground doping and dependence on the dopant polarity are also observed. For $V_T$-modulation larger than 100 mV, heavy ground doping over $1{\times}10^{20}cm^{-3}$ or back biasing scheme is preferred in case of TFETs. Polarity dependence is explained with a mechanism similar to the punch-through of MOSFETs. In spite of some minor differences, this result shows that both MOSFETs and TFETs can share common $V_T$-control scheme when these devices are co-integrated.