• Title/Summary/Keyword: Metal guard ring

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Effect on Metal Guard Ring in Breakdown Characteristics of SiC Schottky Barrier Diode (금속 가드 링이 SiC 쇼트키 다이오드의 항복전압에 미치는 영향)

  • Kim, Seong-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.10
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    • pp.877-882
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    • 2005
  • In order to fabricate a high breakdown SiC-SBD (Schottky barrier diode), we investigate an effect on metal guard ring (MGR) in breakdown characteristics of the SiC-SBD. The breakdown characteristics of MGR-type SiC-SBD is significantly dependent on both the guard ring metal and the alloying time of guard ring metal. The breakdown characteristics of MGR-type SiC-SBDs are essentially improved as the alloying time of guard ring metal is increased. The SiC-SBD without MGR shows less than 200 V breakdown voltage, while the SiC-SBD with Al MGR shows approximately 700 V breakdown voltage. The improvement in breakdown characteristics is attributed to the field edge termination effect by the MGR, which is similar to an implanted guard ring-type SiC-SBD. There are two breakdown origins in the MGR-type SiC-SBD. One is due to a crystal defects, such as micropipes and stacking faults, in the Epi-layers and the SiC substrate, and occurs at a lower electric field. The other is due to the destruction of guard ring metal, which occurs at a higher electric field. The demolition of guard ring metal is due to the electric field concentration at an edge of Schottky contact metal.

Improved breakdown characteristics of Ga2O3 Schottky barrier diode using floating metal guard ring structure (플로팅 금속 가드링 구조를 이용한 Ga2O3 쇼트키 장벽 다이오드의 항복 특성 개선 연구)

  • Choi, June-Heang;Cha, Ho-Young
    • Journal of IKEEE
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    • v.23 no.1
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    • pp.193-199
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    • 2019
  • In this study, we have proposed a floating metal guard ring structure based on TCAD simulation in order to enhance the breakdown voltage characteristics of gallium oxide ($Ga_2O_3$) vertical high voltage switching Schottky barrier diode. Unlike conventional guard ring structures, the floating metal guard rings do not require an ion implantation process. The locally enhanced high electric field at the anode corner was successfully suppressed by the metal guard rings, resulting in breakdown voltage enhancement. The number of guard rings and their width and spacing were varied for structural optimization during which the current-voltage characteristics and internal electric field and potential distributions were carefully investigated. For an n-type drift layer with a doping concentration of $5{\times}10^{16}cm^{-3}$ and a thickness of $5{\mu}m$, the optimum guard ring structure had 5 guard rings with an individual ring width of $1.5{\mu}m$ and a spacing of $0.2{\mu}m$ between rings. The breakdown voltage was increased from 940 V to 2000 V without degradation of on-resistance by employing the optimum guard ring structure. The proposed floating metal guard ring structure can improve the device performance without requiring an additional fabrication step.

A Novel Schottky Diode with the Self-Aligned Guard Ring (자기정렬된 Guard Ring을 갖는 새로운 쇼트키 다이오드)

  • 차승익;조영호;최연익
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.5
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    • pp.573-576
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    • 1992
  • Novel A1-Si Schottky diodes with self-aligned guard rings have been proposed and fabricated using RIE(Reactive Ion Etch). The breakdown voltage of the Schottky diode with the guard ring has been drastically increased to 200V or more in comparison with 46V for the metal overlap Schottky diode.

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Comparison of Electrical Properties of β-Gallium Oxide (β-Ga2O3) Power SBDs with Guard Ring Structures (Guard Ring 구조에 따른 β-산화갈륨(β-Ga2O3) 전력 SBDs의 전기적 특성 비교)

  • Hoon-Ki Lee;Kyujun Cho;Woojin Chang;Jae-Kyoung Mun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.2
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    • pp.208-214
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    • 2024
  • This reports the electrical properties of single-crystal β-gallium oxide (β-Ga2O3) vertical Schottky barrier diodes (SBDs) with a different guard ring structure. The vertical Schottky barrier diodes (V-SBDs) were fabricated with two types guard ring structures, one is with metal deposited on the Al2O3 passivation layer (film guard ring: FGR) and the other is with vias formed in the Al2O3 passivation layer to allow the metal to contact the Ga2O3 surface (metal guard ring: MGR). The forward current values of FGR and MGR V-SBD are 955 mA and 666 mA at 9 V, respectively, and the specific on-resistance (Ron,sp) is 5.9 mΩ·cm2 and 29 mΩ·cm2. The series resistance (Rs) in the nonlinear section extracted using Cheung's formula was 6 Ω, 4.8 Ω for FGR V-SBD, 10.7 Ω, 6.7 Ω for MGR V-SBD, respectively, and the breakdown voltage was 528 V for FGR V-SBD and 358 V for MGR V-SBD. Degradation of electrical characteristics of the MGR V-SBD can be attributed to the increased reverse leakage current caused by the guard ring structure, and it is expected that the electrical performance can be improved by preventing premature leakage current when an appropriate reverse voltage is applied to the guard ring area. On the other hand, FGR V-SBD shows overall better electrical properties than MGR V-SBD because Al2O3 was widely deposited on the Ga2O3 surface, which prevent leakage current on the Ga2O3 surface.

Characterization of small single photon avalanche diode fabricated using standard 180 nm CMOS process for digital SiPM

  • Jinseok Oh;Hakcheon Jeong;Min Sun Lee;Inyong Kwon
    • Nuclear Engineering and Technology
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    • v.56 no.8
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    • pp.3076-3083
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    • 2024
  • In this work, single photon avalanche diodes (SPADs) were fabricated using the standard 180 nm complementary metal-oxide semiconductor process. Their small size of 15-16 µ m and low operating voltage made it possible to easily integrate them with readout circuits for compact on-chip sensors, particularly those used in the radiation sensor network of a nuclear plant. Four architectures were proposed for the SPADs, with a shallow trench isolation (STI) guard ring and different depletion regions designed to demonstrate the main performance parameters in each experimental configuration. The wide absorption region structure with PSD and a deep N-well could achieve a uniform electric field, resulting in a stable dark count rate (DCR). Additionally, the STI guard ring was implanted to mitigate the premature edge breakdown. A breakdown voltage was achieved for a low operating voltage of 10.75 V. The DCR results showed 286.3 Hz per ㎛2 at an excess voltage of 0.04 V. A photon detection probability of 21.48% was obtained at 405 nm.

The Effect of thin Stepped Oside Structure Along Contact Edge on the Breakdown Voltage of Al-nSi Schottky Diode (Al-nSi 쇼트키 다이오드의 접합면 주위의 얇은 계단형 산화막 구조가 항복 전압에 미치는 영향)

  • 장지근;김봉렬
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.20 no.3
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    • pp.33-39
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    • 1983
  • New Schottky devices with thin stepped oxide layer (about 1000 ${\AA}$) along the edge of metal-semiconductor junction have been designed and fabricated. The breakdown voltages of these diodes have been compared with those of conventional metal overlap and P guard ring Schottky diode structures. Thin stepped oxide layer has been grown by the process of T.C.E. oxidation. In order to compare and demonstrate the improved down phenomena of these devices, conventional metal overlap diode and P guard ring which have the same dimension with new devices have also been integrated in a same New Schottty devices structured with thin stepped oxide layer have shown significant improvement in breakdown phenomena compared with conventional diodes.

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Design and Fabrication of a Si pin Photodetector with Peak Spectral Response in the Red Light for Optical Link (적색 중심 Optical Link용 Si pin Photodetector의 설계 및 제작)

  • 장지근;김윤희;이지현;강현구;이상열
    • Journal of the Microelectronics and Packaging Society
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    • v.8 no.1
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    • pp.1-4
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    • 2001
  • We have fabricated and evaluated a new Si pin photodetector for APF optical link. The fabricated device has the $p^{+}$-guard ring around the metal-semiconductor contact and the web patterned $p^{+}$-shallow diffused region in the light absorbing area. From the measurements of electo-optical characteristics under the bias of -5 V, the junction capacitance of 4 pF and the dark current of 180 pA were obtained. The optical signal current of 1.22 $\mu$A and the responsivity of 0.55 A/W were obtained when the 2.2 $\mu$W optical power with peak wavelength of 670 nm was incident on the device. The fabricated device showed the maximum spectral response in a spectrum of 650-700 nm. It is expected that the fabricated device can be very useful for detecting the optical signal in the application of red light optics.

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Fabrication and characteristics of SSIMT using a CMOS Process (CMOS공정에 의한 SSIMT의 제작 및 특성)

  • 송윤귀;임재환;정귀상;김남호;류지구
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.168-171
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    • 2002
  • A SSIMT(Suppressed Sidewall Injection Magnetotransistor) sensor with high linearity is presented in this thesis. The prototype is fabricated by using the Hynix 0.6$\mu\textrm{m}$ P-substrate twin-well double poly three-metal CMOS Process. The fabricated SSIMT shows that variation of the collector current is extremely linear by varing the magnetic induction from -200mT to 200mT at I$\_$B/=500${\mu}$A, V$\_$CE/=2V and V$\_$SUB/=5V. The relative sensitivity is up to 120%/T. At B = 0, magnetic offset is about 79mT, there relative sensitivity is 30.5%/T. The nonlinearity of the fabricated SSIMT is measured about 1.4%.

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EM Coupling Effect of sprint inductors by isolation methode in standard CMOS process (Spiral 인덕터 간 격리방법에 따른 Electromagnetic 커플링 효과)

  • Choi, Moon-Ho;Kim, Han-Seok;Jung, Sung-Il;Kim, Yeong-Seuk
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.11a
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    • pp.91-92
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    • 2005
  • The electromagnetic coupling effect in standard CMOS process is simulated and evaluated. EM coupling transfer characteristic between planar spiral inductors by isolation methode in standard CMOS have simulated and measured. Measurement results show that suppression of EM coupling effect by ground guardring. The evaluated structures are fabricated 1P5M(one poly, five metal) 0.25um standard CMOS process. These measurement results provide a isolation design guidelines in standard CMOS process for Rf coupling suppression.

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Fabrication of Schottky diodes for RFID tag integration using Standard $0.18{\mu}m$ CMOS process (RFID tag 집적화를 위한 $0.18{\mu}m$ 표준 CMOS 공정을 이용한 쇼트키 다이오드의 제작)

  • Shim, Dong-Sik;Min, Young-hun
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.591-592
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    • 2006
  • Schottky diodes for Radio-frequency identification (RFID) tag integration on chip were designed and fabricated using Samsung electronics System LSI standard $0.18{\mu}m$ CMOS process. Schottky diodes were designed as interdigitated fingers array by CMOS layout design rule. 64 types of Schottky diode were designed and fabricated with the variation of finger width, length and numbers with a $0.6{\mu}m$ guard ring enclosing n-well. Titanium was used as Schottky contact metal to lower the Schottky barrier height. Barrier height of the fabricated Schottky diode was 0.57eV. DC current - voltage measurements showed that the fabricated Schottky diode had a good rectifying properties with a breakdown voltage of -9.15 V and a threshold voltage of 0.25 V.

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