• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.118-120
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• 2022

This paper investigated the change of threshold voltage according to the influence of work-function variation (WFV) of metal gate in the device structure of monolithic 3-dimension inverter (M3DINV). In addition, in order to investigate the change in threshold voltage according to the electrical coupling of the NMOS stacked on the PMOS, the gate voltages of PMOS were applied as 0 and 1 V and then the electrical coupling was investigated. The average change in threshold voltage was measured to be 0.1684 V, and they standard deviation was 0.00079 V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.36-36
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• 2009

In this work, we describe a method to fabricate the Pt-silicided SB-MOSFETs with a n-type Silicon-On-Insulator (SOI) substrate as an active layer and demonstrate their electrical and structural properties. The fabricated SB-MOSFETs have novel structure and metal gate without sidewall. The gate oxide with a thickness of 7 nm was deposited by sputtering. Also, this fabrication processes were carried out below $500^{\circ}C$. As a result, Subthreshold swing value and on/off ratio of Fabricated SB MOSFETs was 70 [mV/dec] and $10^8$.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.23 no.8
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• pp.987-996
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• 1999

An algorithm for modeling the filling of metal into a mold and solidification has been developed. This algorithm uses the implicit VOF method for a filling and a general implicit source-based method for solidification. The model for simultaneous filling and solidification is applied to the two-dimensional filling and solidification of a square cavity. The effects of the wall temperature and gate position on the solidification are examined. The mixed natural convection flow and residual flow resulting from the completion of a filling are included in this study to investigate the coupled effects of the filling and natural convection on solidification. Two different filling configurations (assisting flow and opposite flow due to the gate position) are analysed to study the effects of residual flow on solidification. The results clearly show the necessity to carry out a coupled filling and solidification analysis including the effect of natural convection.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.411-414
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• 1999

70 ${\AA}$-thick oxides nitridied at various conditions were reoxidized at pemperatures of 900$^{\circ}C$ in dry-O$_2$ ambients for 5～40 mininutes. The gate oxide interface porperties as well as the oxide substrate interface properties of MOS(Metal Oxide Semiconductor) capacitors with various nitridation conditions, reoxidation conditions and pure oxidation condition were investigated. We stuided I$\sub$g/-V$\sub$g/ characteristics, $\Delta$V$\sub$g/ shift under constant current stress from electrical characteristics point of view and breakdown voltage from leakage current point of view of MOS capacitors with SiO$_2$, NO, RNO dielectrics. Overall, our experimental results show that reoxidized nitrided oxides show inproved charge trapping porperites, I$\sub$g/-V$\sub$g/ characteristics and gate $\Delta$V$\sub$g/ shift. It has also been shown that reoxidized nitridied oxide's leakage currented voltage is better than pure oxide's or nitrided oxide's from leakage current(1${\mu}$A) point of view.

• Electrical & Electronic Materials
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• v.11 no.10
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• pp.94-99
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• 1998

Suitable replacement materials for ultrathin SiO2 in deeply scaled MOSFETs such as lattice polarizable films, which have much higherpermittivities than SiO2, have bandgaps of only 3.0 to 4.0 eV. Due to these small bandgaps, the reliability of these films as a gate insulator is a serious concern. Ramped voltage, time dependent dielectric breakdown, and hot carrier effect measurements were done on 190 layers of TiO2 which were deposited through the metal-organic chemical vapor deposition of titanium tetrakis-isopropoxide (TTIP). Measurements of the high and low frequency capacitance indicate that virtually no interface state are created during constant current injection stress. The increase in leakage upon electrical stress suggests that uncharged, near-interface states may be created in the TiO2 film near the SiO2 interfacial layer that allow a tunneling current component at low bias.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.1
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• pp.43-50
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• 2007

In a high-speed flash style or a pipelining style analog-to-digital converter (A/D converter), the DC reference fluctuation caused by external noises becomes serious, as the sampling frequency is increased. To reduce the fluctuations in conventional A/D converters, capacitors have been simply used, but the layout area was large. Instead of capacitors, a low-noise and small-size DC reference circuit based on transmission gate (TG) is proposed in this paper. In order to verify the proposed technique, we designed and manufactured a 6-bit 2GSPS CMOS A/D converter. The A/D converter is designed with a 0.18um 1-poly 6-metal n-well CMOS technology, and it consumes 145mW at 1.8V power supply. It occupies the chip area of 977um by 1040um. The measured result shows that SNDR is 36.25 dB and INL/DNL is within 0.5LSB, even though the DC reference fluctuation is serious.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2000.10a
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• pp.185-190
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• 2000

Die design by computer simulation has some advantages compared with the conventional method which has performed by designer's experiences and trials and errors. The die filling and solidification process of thixoforming process were simulated by MAGMAsoft/thixo module. First of all, thixoforming die design was applied to previously geometry shape. The value of pressure distribution shows high and uniform as the gate diameter is 18mm. Designed gating system considering the deformation of die and product was suggested by the filling simulation. Gate velocity(7.25m/s) of designed gating system shows that propriety to semi-solid metal working process and CAE results were in good agreement with experimental results.

• Journal of information and communication convergence engineering
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• v.10 no.2
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• pp.194-199
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• 2012

This paper proposes a novel scheme of a gray scale fingerprint image for a high-accuracy capacitive sensor chip. The conventional grayscale image scheme uses a digital-to-analog converter (DAC) of a large-scale layout or charge-pump circuit with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit for the charge sharing scheme is proposed, which uses a down literal circuit (DLC) with a floating-gate metal-oxide semiconductor transistor (FGMOS) based on a neuron model. The detection circuit is designed and simulated in a 3.3 V, 0.35 ${\mu}m$ standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, the pixel layout size can be reduced and the image resolution can be improved.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.190-193
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• 2006

we implemented pentacene TFTs able to operate at low voltage less than 2V by using ultrathin Al2O3 layer as a gate insulator. The OTFTs exhibited a mobility of $0.27{\pm}0.05\;cm^2/Vs$, an outstanding subthreshold slope of $0.109{\pm}0.027$, and an on/off current ratio of $2.87{\pm}1.07{\times}10^4$. OTFT operated at low voltage, producing 3.5uA at $V_GS$= 2V and $V_DS$= 1.5V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.359-359
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• 2010

IGBT(Insulated Gate Bipolar Transistor) 란 MOS(Metal Oxide Silicon) 와 Bipolar 기술의 결정체로 낮은 순방향 손실(Low Saturation)과 빠른 Speed를 특징으로 기존의 Thyristor, BJT, MOSFET 등으로 실현 불가능한 분양의 응용처를 대상으로 적용이 확대 되고 있고, 300V 이상의 High Power Application 영역에서 널리 사용되고 있는 고효율, 고속의 전력 시스템에 있어서 필수적으로 이용되는 Power Device이다. IGBT는 출력 특성 면에서 Bipolar Transistor 이상의 전류 능력을 가지고 있고 입력 특성 면에서 MOSFET과 같이 Gate 구동 특성을 갖기 때문에 High Switching, High Power에 적용이 가능한 소자이다. 반면에, Conventional IGBT는 MOSFET과 달리 IGBT 내부에 Anti-Parallel Diode가 없기 때문에 Inductive Load Application 적용시에는 별도의 Free Wheeling Diode가 필요하다. 그래서, 본 논문에서 별도의 Anti-Parallel Diode의 추가 없이도 Inductive Load Application에 적용 가능한 RC IGBT를 적용하여 600V/15A급 Three Phase Inverter Module을 제안 하고자 한다.