• Journal of the Semiconductor & Display Technology
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• v.19 no.3
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• pp.112-117
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• 2020

NAND flash memory is a non-volatile memory that retains stored data even without power supply. Internal memory used as a data storage device and solid-state drive (SSD) is used in portable devices such as smartphones and digital cameras. However, NAND flash memory carries the risk of electric shock, which can cause errors during read/write operations, so use error correction codes to ensure reliability. It efficiently recovers bad block information, which is a defect in NAND flash memory. BBT (Bad Block Table) is configured to manage data to increase stability, and as a result of experimenting with the error correction code algorithm, the bit error rate per page unit of 4Mbytes memory was on average 0ppm, and 100ppm without error correction code. Through the error correction code algorithm, data stability and reliability can be improved.

• The Journal of Pediatrics of Korean Medicine
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• v.23 no.1
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• pp.95-113
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• 2009

Objectives This study was investigated to find how the orally administrated Moschus, herbal combination with Moschus, and herbal combination improves the rats' memory and rats' liver. These medications are generally known asthe memory improvement. Methods This study used the Sprague Dawley rats. They were divided into two groups - SD rats and orally administrated Saline(Control group). 0.473 mg/kg Moschus(HM-A), 153.9 mg/kg herbal composition without Moschus(HM-B), and 165.95 mg/kg herbal composition with Moschus combined(HM-C) Control, saline were orally administered. Each group was trained in the eight-arm radial maze task at the conditions of before oral administrated, and also right after third, sixth, and eighth by oral administration. Lastly, these animals were killed and were tested for brain tissue and serum AST/ALT level to measure how the medications were effected to the liver function. Results The result of radial eight-arm maze task test, the HM-B and HM-C groups showed significant decrease in mistakes from the fourth day of testing. Whereas, the HM-A group showed increasing in the error rate. HM-A and HM-C group of rats had significantly increased amount of acetylcholinesterase in the CA1 region of hippocampus, compared to the control group. Whereas, HM-B and HM-C group had increased level of ChAT compared to the control group. On the other hand, each experimental group did not show any significant difference to the level of serum AST/ALT and the weight ratio of the liver to the body. Conclusions This study provided evidences that the orally administered memory improvement herbal medication, and Moschus were effective to improve memory.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.40 no.7
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• pp.718-724
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• 1991

In this paper, we proposed an algorithm to improve the memory efficiency by means of learning thresholds in spite of correlations among input patterns to be memorized. The proposed algorithm does not need preprocess correlations among input patterns but processes them with a threshold on a neural network. When memory contents are destroyed by correlation, nearly all patterns can be properly recovered with past learning. Through experiments we show how out algorithm can improve the memory efficiency.

• Journal of the Korea Society of Computer and Information
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• v.17 no.7
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• pp.1-11
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• 2012

As process technology scales down, the number of cores integrated into a processor increases dramatically, leading to significant performance improvement. Especially, the GPU(Graphics Processing Unit) containing many cores can provide high computational performance by maximizing the parallelism. In the GPU architecture, the access latency to the main memory becomes one of the major reasons restricting the performance improvement. In this work, we analyze the performance improvement of the 3D GPU architecture compared to the 2D GPU architecture quantitatively and investigate the potential problems of the 3D GPU architecture. In general, memory instructions account for 30% of total instructions, and global/local memory instructions constitutes 60% of total memory instructions. Therefore, the performance of the 3D GPU is expected to be improved significantly compared to the 2D GPU by reducing the delay of memory instructions. However, according to our experimental results, the 3D architecture improves the GPU performance only by 2% compared to the 2D architecture due to the memory bottleneck, since the performance reduction due to memory bottleneck in the 3D GPU architecture increases by 245% compared to the 2D architecture. This paper provides the guideline for suitable memory design by analyzing the efficiency of the memory architecture in 3D GPU architecture.

• The Journal of Korean Medicine
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• v.20 no.4
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• pp.39-49
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• 2000

This study was conducted to prove that there exists a relation between the spleen and learning and memory as Oriental medicine believesTo promote the function of the Spleen, Guibitang was administered to rats in this study. Rats were 250～300g Sprague-Dawley, and were divided into three groups. One was the normal group without any pretreatment. Another was the control group which was administered normal saline and the abdominal injection of L-NAME before learning and memory test. And the 3rd was the sample group, to which was administered Guibitang extract and (no 'the') abdominal injection of L-NAME before the learning and memory test. Each group was made up of 12 rats. Morris water maze and radial arm maze tasks were performed in the learning test and Morris water maze task in the memory test. For 2 days to evaluate the ability of learning in the Morris water maze, 16 trials were carried out and first latency(lapse time to find the escape platform for the first time) was measured. The next day, to evaluate the ability of memory, the escape platform was eliminated from the maze, and total path, target entry number, first latency and memory score were measured. 48hrs before the radial arm maze task was performed, bait was deprived from each group. After learning test, bait was permitted to each group. So 85% of the body weight was maintained for 6 days of the test. Each of the eight arms was baited; correct choice numer and error were counted; each trial was finished when the rat had entered each of the eight arms, or more than 10 minutes had elapsed. The results were as follows: In the learning test, the first latency of the sample group in the Morris water maze showed evident improvement of learning compared to control group at the 11th, 12th, 13th trial of 16 trials, and correct choice number in radial arm maze showed noticeable improvement compared to the control group at 3rd, 4th and 5th; In the memory test, the memory score of the sample group showed evident improvement compared to the control group. From the above results, the administration of Guibitang, which tonifies the function of the Spleen, could enhance the ability of learning and memory. So it was suggested that the Spleen has a relation with learning and memory.

• IEMEK Journal of Embedded Systems and Applications
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• v.7 no.4
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• pp.201-207
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• 2012

Currently, NAND Flash memory has been widely used in consumer storage devices due to its non-volatility, stability, economical feasibility, low power usage, durability, and high density. However, a high capacity of NAND flash memory causes the high power consumption and the low performance. In the convention memory research, a hierarchical filter mechanism can archive an effective performance improvement in terms of the power consumption. In order to attain the best filter structure for NAND flash memory, we selected a direct-mapped filter, a victim filter, a fully associative filter and a 4-way set associative filter for comparison in the performance analysis. According to the results of the simulation, the fully associative filter buffer with a 128byte fetching size can obtain the bet performance compared to another filter structures, and it can reduce the energy*delay product(EDP) by about 93% compared to the conventional NAND Flash memory.

• Journal of IKEEE
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• v.18 no.3
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• pp.392-397
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• 2014

In this paper, we propose a memory operation system architecture for memory latency penalty reduction in SIMT architecture based stream processor. The proposed architecture applied non-blocking cache architecture to reduce cache miss penalty generated by blocking cache architecture. We verified that the proposed memory operation architecture improve the performance of the stream processor by comparing processing performances of various algorithms. We measured the performance improvement rate that was improved in accordance with the ratio of memory instruction in each algorithm. As a result, we confirmed that the performance of stream processor improves up to minimum 8.2% and maximum 46.5%.

• Journal of Oriental Neuropsychiatry
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• v.10 no.1
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• pp.1-15
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• 1999

The effects of Sahyangsohapwon on the enhancement of learning and memory of AD model rats were studied with Morris water maze and radial arm maze. Sample group was electrolytically lesioned on nbM, and then daily treated with the medicine for two months. Control group with nbM lesion, and sham group with the sham operation were treated the vehicle for same duration. The following results were observed. In the learning trials of Morris water maze, all three groups were improved in learning capacity as trials were repeated, but the sham group showed more prominent improvement in learning compared with the control group(p<0.01). 2. In memory retention test of Morris water maze, the sham group marked more significant improvement statistically in memory retention compared with the control group(p<0.05). 3. In the learning of radial arm maze, the sham group shows better learning capacity significantly compared with the control group(p<0.05). With the experimental results above, Sahyangsohapwon can be supposed to have the improving effects on the learning and memory of AD rats induced by electronical injury of nbM.

• Journal of Information Technology Applications and Management
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• v.11 no.1
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• pp.189-200
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• 2004

Recently Flash Memory which is small and low-powered is widely used as a storage of embedded system, because an embedded system requests portability and a fast response. To resolve a difference of access time between a storage and RAM, Linux is using disk caching which copies a part of file on disk into RAM. It is not also an exception on embedded system. A READ access-time of flash memory is similar to RAMs. So, when a process on an embedded system reads data, it is similar to the time to access cached data in RAM and to access directly data on a flash memory. On the embedded system using limited memory, using a disk cache is that wastes much time and memory spaces to manage it and can not reflects the characteristic of a flash memory. This paper proposes the regular file access of limited using a page cache in the file system based on a flash memory and reflects the characteristic of a flash memory. The proposed algorithm minimizes power consumption because access numbers of the RAM are reduced and doesn't waste a memory space because it accesses directly to a flash memory Therefore, the performance improvement of the system applying the proposed algorithm is expected.

• Journal of the Korea Society of Computer and Information
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• v.24 no.3
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• pp.1-9
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• 2019

This paper presents three potential risks in an environment that simultaneously performs the garbage collection and wear leveling in NAND flash memory. These risks may not only disturb the lifespan improvement of NAND flash memory, but also impose an additional overhead of page migrations. In this paper, we analyze the interference of garbage collection and wear leveling and we also provide two theoretical considerations for lifespan prolongation of NAND flash memory. To prove two solutions of three risks, we construct a simulation, based on DiskSim 4.0 and confirm realistic impacts of three risks in NAND flash memory. In experimental results, we found negative impacts of three risks and confirmed the necessity for a coordinator module between garbage collection and wear leveling for reducing the overhead and prolonging the lifespan of NAND flash memory.