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http://dx.doi.org/10.14372/IEMEK.2012.7.4.201

Analysis on the Effectiveness of the Filter Buffer for Low Power NAND Flash Memory  

Jung, Bo-Sung (경상대학교 ERI 제어계측공학과)
Lee, Jung-Hoon (경상대학교 ERI 제어계측공학과)
Publication Information
IEMEK Journal of Embedded Systems and Applications / v.7, no.4, 2012 , pp. 201-207 More about this Journal
Abstract
Currently, NAND Flash memory has been widely used in consumer storage devices due to its non-volatility, stability, economical feasibility, low power usage, durability, and high density. However, a high capacity of NAND flash memory causes the high power consumption and the low performance. In the convention memory research, a hierarchical filter mechanism can archive an effective performance improvement in terms of the power consumption. In order to attain the best filter structure for NAND flash memory, we selected a direct-mapped filter, a victim filter, a fully associative filter and a 4-way set associative filter for comparison in the performance analysis. According to the results of the simulation, the fully associative filter buffer with a 128byte fetching size can obtain the bet performance compared to another filter structures, and it can reduce the energy*delay product(EDP) by about 93% compared to the conventional NAND Flash memory.
Keywords
NAND flash memory; Filter mechanism; Low power; Cache memory;
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