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http://dx.doi.org/10.9708/jksci.2019.24.03.001

Analysis of Potential Risks for Garbage Collection and Wear Leveling Interference in FTL-based NAND Flash Memory  

Kim, Sungho (Dept. of Computer Engineering, Yeungnam University)
Kwak, Jong Wook (Dept. of Computer Engineering, Yeungnam University)
Publication Information
Journal of the Korea Society of Computer and Information / v.24, no.3, 2019 , pp. 1-9 More about this Journal
Abstract
This paper presents three potential risks in an environment that simultaneously performs the garbage collection and wear leveling in NAND flash memory. These risks may not only disturb the lifespan improvement of NAND flash memory, but also impose an additional overhead of page migrations. In this paper, we analyze the interference of garbage collection and wear leveling and we also provide two theoretical considerations for lifespan prolongation of NAND flash memory. To prove two solutions of three risks, we construct a simulation, based on DiskSim 4.0 and confirm realistic impacts of three risks in NAND flash memory. In experimental results, we found negative impacts of three risks and confirmed the necessity for a coordinator module between garbage collection and wear leveling for reducing the overhead and prolonging the lifespan of NAND flash memory.
Keywords
NAND Flash Memory; Wear Leveling; Garbage Collection; Lifespan; Interference Risk;
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  • Reference
1 Micron, M. L. C. "SSD Specification, 2013."
2 Chung, Tae-Sun, et al. "A survey of flash translation layer." Journal of Systems Architecture 55.5-6 (2009): 332-343.   DOI
3 Yang, Ming-Chang, et al. "Garbage collection and wear leveling for flash memory: Past and future." Smart Computing (SMARTCOMP), 2014 International Conference on. IEEE, 2014.
4 Wu, Michael, and Willy Zwaenepoel. "eNVy: a non-volatile, main memory storage system." ACM SIGOPS Operating Systems Review. Vol. 28. No. 5. ACM, 1994.
5 Kawaguchi, Atsuo, Shingo Nishioka, and Hiroshi Motoda. "A flash-memory based file system." USENIX. 1995.
6 Kwon, Ohhoon, and Kern Koh. "Swap space management technique for portable consumer electronics with NAND flash memory." IEEE Transactions on Consumer Electronics 56.3 (2010).
7 Chang, Yuan-Hao, Jen-Wei Hsieh, and Tei-Wei Kuo. "Improving flash wear-leveling by proactively moving static data." IEEE Transactions on Computers 59.1 (2010): 53-65.   DOI
8 MT29F4G08ABADAWP 8Gbit SLC NAND Flash Memory Data Sheet, Micro Technology, 2009.
9 K9GAG08U0M 2G x 8bit MLC NAND Flash Memory Data Sheet, Samsung Electronics, https://www.samsung.com, 2007
10 Hachiya, Shogo, et al. "TLC/MLC NAND flash mix-and-match design with exchangeable storage array." Extended Abstracts 2013 Int. Conf. Solid State Devices Mater. 2013.
11 Bucy, John S. et al. "The disksim simulation environment version 4.0 reference manual (cmu-pdl-08-101)." Parallel Data Laboratory (2008): 26.
12 Prabhakaran, Vijayan, and Ted Wobber. "SSD extension for DiskSim simulation environment." Microsoft Reseach (2009).
13 Liberatore, Marc, and Prashant Shenoy. "Umass trace repository." (2017).
14 Trace, Exchange. "SNIA IOTTA Repository." (2010).
15 Samsung, V., and NAND SSD. "860 EVO." (2018).
16 Statistik-Portal, Statista-Das. "statista-The statistics portal." 2017.
17 Park, Ki-Tae, et al. "Three-dimensional 128 Gb MLC vertical NAND flash memory with 24-WL stacked layers and 50 MB/s high-speed programming." IEEE Journal of Solid-State Circuits 50.1 (2015): 204-213.   DOI
18 Ma, Dongzhe, Jianhua Feng, and Guoliang Li. "A survey of address translation technologies for flash memories." ACM Computing Surveys (CSUR) 46.3 (2014): 36.
19 Chen, Renhai, et al. "Heating dispersal for self-healing NAND flash memory." IEEE Transactions on Computers 66.2 (2017): 361-367.   DOI
20 Chung, Tae-Sun, et al. "System software for flash memory: a survey." International Conference on Embedded and Ubiquitous Computing. Springer, Berlin, Heidelberg, 2006.