• Title/Summary/Keyword: Memory Injection

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A Study on Width of Dummy Switch for performance improvement in Current Memory (Current Memory의 성능 개선을 위한 Dummy Switch의 Width에 관한 연구)

  • Jo, Ha-Na;Hong, Sun-Yang;Jeon, Seong-Yong;Kim, Seong-Gwon
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2007.04a
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    • pp.485-488
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    • 2007
  • 최근 Analog Sampled-Data 신호처리를 위하여 주목되고 있는 SI(Switched-Current) circuit은 저전력 동작을 하는 장점이 있지만, 반면에 SI circuit에서의 기본 회로인 Current Memory는 Charge Injection에 의한 Clock Feedthrough이라는 치명적인 단점을 갖고 있다. 따라서 본 논문에서는 Current Memory의 문제점인 Clock Feedthrough의 일반적인 해결방안으로 Dummy Switch의 연결을 검토하였고, Austria Mikro Systeme(AMS)에서 $0.35{\mu}m$ CMOS process BSIM3 Model로 제작하기 위하여 Current Memory의 Switch MOS와 Dummy Switch MOS의 적절한 Width을 정의하여야 하므로, 그 값을 도출하였다. Simulation 결과, Switch의 Width는 $2{\mu}m$, Dummy Switch의 Width는 $2.35{\mu}m$로 정의될 수 있음을 확인하였다.

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A study on the High Integrated 1TC SONOS Flash Memory (고집적화된 1TC SONOS 플래시 메모리에 관한 연구)

  • 김주연;이상배;한태현;안호명;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.26-31
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    • 2002
  • To realize a high integrated Flash memory utilizing SONOS memory devices, the NOR type 1TC(one Transistor Cell) SONOS Flash arrays are fabricated and characterized. This SONOS Flash arrays with common source lines are designed and fabricated by conventional 0.35$\mu\textrm{m}$ CMOS process. The thickness of ONO for memory cell is tunnel oxide of 34${\AA}$, nitride of 73${\AA}$ and blocking oxide of 34${\AA}$. To investigate operating characteristics, CHEI(Channel Hot Electron Injection) method and Bit line erase method are selected as the write operation and the erase method, respectively. The disturbance characteristics according to the write/erase/read cycling are also examined. The degradation characteristics are investigated and then the reliability of SONOS flash memory is guaranteed.

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A Study on the High Integrated 1TC SONOS flash Memory (고집적화된 1TC SONOS 플래시 메모리에 관한 연구)

  • 김주연;김병철;서광열
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.5
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    • pp.372-377
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    • 2003
  • To realize a high integrated flash memory utilizing SONOS memory devices, the NOR type ITC(one Transistor Cell) SONOS flash arrays are fabricated and characterized. This SONOS flash arrays with the common source lines are designed and fabricated by conventional 0.35$\mu\textrm{m}$ CMOS process. The thickness of ONO for memory cells is tunnel oxide of 34${\AA}$, nitride of 73${\AA}$ and blocking oxide of 34${\AA}$ . To investigate operating characteristics, CHEI(Channel Hot Electron Injection) method and bit line method are selected as the program and 4he erase operation, respectively. The disturbance characteristics ,according to the program/erase/read cycling are also examined. The degradation characteristics are investigated and then the reliability of SONOS flash memory is guaranteed.

A method for preventing online games hacking using memory monitoring

  • Lee, Chang Seon;Kim, Huy Kang;Won, Hey Rin;Kim, Kyounggon
    • ETRI Journal
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    • v.43 no.1
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    • pp.141-151
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    • 2021
  • Several methods exist for detecting hacking programs operating within online games. However, a significant amount of computational power is required to detect the illegal access of a hacking program in game clients. In this study, we propose a novel detection method that analyzes the protected memory area and the hacking program's process in real time. Our proposed method is composed of a three-step process: the collection of information from each PC, separation of the collected information according to OS and version, and analysis of the separated memory information. As a result, we successfully detect malicious injected dynamic link libraries in the normal memory space.

Experimental Study on the Influence of the Function of Spleen on Learning and Memory (비기능이 학습과 기억에 미치는 영향에 대한 실험적 연구)

  • 박찬원;이진우;채한;홍무창;신민규
    • The Journal of Korean Medicine
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    • v.20 no.4
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    • pp.39-49
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    • 2000
  • This study was conducted to prove that there exists a relation between the spleen and learning and memory as Oriental medicine believesTo promote the function of the Spleen, Guibitang was administered to rats in this study. Rats were 250~300g Sprague-Dawley, and were divided into three groups. One was the normal group without any pretreatment. Another was the control group which was administered normal saline and the abdominal injection of L-NAME before learning and memory test. And the 3rd was the sample group, to which was administered Guibitang extract and (no 'the') abdominal injection of L-NAME before the learning and memory test. Each group was made up of 12 rats. Morris water maze and radial arm maze tasks were performed in the learning test and Morris water maze task in the memory test. For 2 days to evaluate the ability of learning in the Morris water maze, 16 trials were carried out and first latency(lapse time to find the escape platform for the first time) was measured. The next day, to evaluate the ability of memory, the escape platform was eliminated from the maze, and total path, target entry number, first latency and memory score were measured. 48hrs before the radial arm maze task was performed, bait was deprived from each group. After learning test, bait was permitted to each group. So 85% of the body weight was maintained for 6 days of the test. Each of the eight arms was baited; correct choice numer and error were counted; each trial was finished when the rat had entered each of the eight arms, or more than 10 minutes had elapsed. The results were as follows: In the learning test, the first latency of the sample group in the Morris water maze showed evident improvement of learning compared to control group at the 11th, 12th, 13th trial of 16 trials, and correct choice number in radial arm maze showed noticeable improvement compared to the control group at 3rd, 4th and 5th; In the memory test, the memory score of the sample group showed evident improvement compared to the control group. From the above results, the administration of Guibitang, which tonifies the function of the Spleen, could enhance the ability of learning and memory. So it was suggested that the Spleen has a relation with learning and memory.

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WORM Behavior of 6F-TPA PI by Hole Injection

  • Lee, Gyeong-Jae;Im, Gyu-Uk;Yang, Mi-Hyeon;Gang, Tae-Hui;Jeong, Seok-Min
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.244-244
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    • 2012
  • Polymer memory devices have attracted considerable attention because of their advantages such as low cost potential, good scalability, flexibility, simplicity in structure, and large capacity for data storage. Metal/poly (4,4'-aminotriphenylene hexafluoroisopropylidenediphthalimide) (6F-TPA PI)/metal system has been found to show an electrical bi-stable behavior. Here, we show a novel set-up of 6F-TPA PI/Al sample in which holes are injected by photoelectron emission process instead of direct charge carrier injection via metal electrode. In this process, an irreversible electrical phase transition of 6F-TPA PI is found, leading to a write-once-read-many (WORM) behavior. The photoelectron spectroscopy results measured before and after the switching process revealed that the irreversible electrical phase transition of 6F-TPA PI is attributed to the chemical modification of the carbonyl group in phthalimide moiety.

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Electromagnetic Susceptibility Analysis of I/O Buffers Using the Bulk Current Injection Method

  • Kwak, SangKeun;Nah, Wansoo;Kim, SoYoung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.2
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    • pp.114-126
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    • 2013
  • In this paper, we present a set of methodologies to model the electromagnetic susceptibility (EMS) testing of I/O buffers for mobile system memory based on the bulk current injection (BCI) method. An efficient equivalent circuit model is developed for the current injection probe, line impedance stabilization network (LISN), printed circuit board (PCB), and package. The simulation results show good correlation with the measurements and thus, the work presented here will enable electromagnetic susceptibility analysis at the integrated circuit (IC) design stage.

Fault injection and failure analysis on Xilinx 16 nm FinFET Ultrascale+ MPSoC

  • Yang, Weitao;Li, Yonghong;He, Chaohui
    • Nuclear Engineering and Technology
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    • v.54 no.6
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    • pp.2031-2036
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    • 2022
  • Energetic particle strikes the device and induces data corruption in the configuration memory (CRAM), causing errors and even malfunctions in a system on chip (SoC). Software-based fault injection is a convenient way to assess device performance. In this paper, dynamic partial reconfiguration (DPR) is adopted to make fault injection on a Xilinx 16 nm FinFET Ultrascale+ MPSoC. And the reconfiguration module implements the Sobel and Gaussian image filtering, respectively. Fault injections are executed on the static and reconfiguration modules' bitstreams, respectively. Another contribution is that the failure modes and effects analysis (FMEA) method is applied to evaluate the system reliability, according to the obtained injection results. This paper proposes a software-based solution to estimate programmable device vulnerability.

Injection Molding Technology for Thin Wall Plastic Part - II. Side Gate Removal Technology Using Cold Press Cutting Process (초정밀 박육 플라스틱 제품 성형기술- II. 냉간 절단 공정 활용 사이드 게이트 제거기술)

  • Heo, Young-Moo;Shin, Kwang-Ho;Choi, Bok-Seok;Kwon, Oh-Keun
    • Design & Manufacturing
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    • v.10 no.3
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    • pp.1-7
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    • 2016
  • In the semiconductor industry the memory and chip were developed to high density memory and high performance chip, so circuit design was also high integrated and the test bed was needed to be thin and fine pitch socket. LGA(Land Grid Array) IC socket with thin wall thickness was designed to satisfy this requirement. The LGA IC socket plastic part was manufacture by injection molding process, it was needed accuracy, stiffness and suit resin with high flowability. After injection molding process the side gates were needed to remove for further assembly process. ln this study, the cold press cutting process was applied to remove the gates. For design of punch and die, the cold press cutting analysis was implemented by$DEFORM-2D^{TM}$ ln consideration of the simulation results, an adequate punch and die was designed and made for the cutting unit. In order to verify the performance of cutting process, the roughness of cutting section of the part was measured and was satisfied in requirement.

Effects of Electroacupuncture on Memory Modulation (전기 침 자극의 기억 조절 효과)

  • Lee, Sang-Kwan;Kim, Min-Soo;Ahn, Ryun-Sup;Kim, Moon-Soo;Sung, Kang-Keyng
    • Journal of Physiology & Pathology in Korean Medicine
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    • v.21 no.6
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    • pp.1543-1548
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    • 2007
  • Recent experiments investigating the analgesic or anti-stress effects of electro-acupuncture provide extensive evidence that opioid or stress hormone system is involved in those effects, respectively. It has been also suggested that opioid or stress hormones modulate long-term memory consolidation or retrieval in animals and human subjects. This article reviews the possibilitythat electroacupuncture can modulate memory consolidation or retrieval. The release of serum cortisol is enhanced or reduced by high-frequency or low-frequency electroacupuncture, respectively. Also the release of beta endorphin and enkephalin is enhanced by low-frequency electroacupuncture and the release of dynorphin is enhanced by high-frequency electroacupunture. The memory consolidation is enhanced by post-training injection of Glucocorticoids, Naloxone or Dynorphin. So this review suggests strongly that memory consolidation can be modulated by electroacupuncture.