• 대한수학회보
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• 제55권1호
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• pp.41-50
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• 2018

This paper mainly considers a tuple of multiplication operators on Bergman spaces over polydisks which essentially arise from a matrix, their joint reducing subspaces and associated von Neumann algebras. It is shown that there is an interesting link of the non-triviality for such von Neumann algebras with the determinant of the matrix. A complete characterization of their abelian property is given under a more general setting.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 심포지엄 논문집 정보 및 제어부문
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• pp.91-92
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• 2008

본 논문에서는 기존의 H.264/AVC의 spatial 영역에서 Intra prediction 기법과 달리 H.264/AVC에서 사용하는 Integer DCT 영역에서 Intra prediction 기법을 제안한다. 이를 위하여 Integer DCT 영역에서 Intra prediction을 수행하는 모든 과정을 matrix multiplication으로 표현하여 Intra prediction을 수행하는 matrix를 유도한다. Intra prediction을 수행하는 matrix를 각 모드에 알맞게 설계하고, 이 matrix를 Integer DCT 영역에서 사용할 수 있도록 orthogonal한 Integer matrix를 설계한다. 실험을 통하여 제안한 Integer DCT 영역에서 Intra prediction 기법이 기존의 H.264/AVC의 spatial 영역에서 intra prediction 기법과 성능이 동일하면서 어떻게 matrix multiplication에 연산들을 포함시켜서 단순화 할 수 있는지를 보여주겠다. 또한 H.264/AVC에서 제공하는 intra prediction 각 모드에 대해 계산상 복잡도를 분석하였다.

• 한국정보보호학회:학술대회논문집
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• 한국정보보호학회 1991년도 학술발표논문집
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• pp.40-48
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• 1991

McEliece 공개키 암호체계에 대한 새로운 암호해독적 공격이 제시되어진다. 기존의 암호해독 algorithm이 exponential-time의 complexity를 가지는 반면, 본고에서 제시되어지는 algorithm은 polynomial-time의 complexity를 가진다. 모든 linear codes에는 systematic generator matrix가 존재한다는 사실이 본 연구의 동기가 된다. Public generator matrix로부터, 암호해독에 사용되어질 수 있는 새로운 trapdoor generator matrix가 Gauss-Jordan Elimination의 역할을 하는 일련의 transformation matrix multiplication을 통해 도출되어진다. 제시되어지는 algorithm의 계산상의 complexity는 주로 systematic trapdoor generator matrix를 도출하기 위해 사용되는 binary matrix multiplication에 기인한다. Systematic generator matrix로부터 쉽게 도출되어지는 parity-check matrix를 통해서 인위적 오류의 수정을 위한 Decoding이 이루어진다.

• Journal of Information Processing Systems
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• 제16권6호
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• pp.1359-1371
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• 2020

In transmitting and receiving such a large amount of data, reliable data communication is crucial for normal operation of a device and to prevent abnormal operations caused by errors. Therefore, in this paper, it is assumed that an error correction code (ECC) that can detect and correct errors by itself is used in an environment where massive data is sequentially received. Because an embedded system has limited resources, such as a low-performance processor or a small memory, it requires efficient operation of applications. In this paper, we propose using an accelerated ECC-decoding technique with a graphics processing unit (GPU) built into the embedded system when receiving a large amount of data. In the matrix-vector multiplication that forms the Hamming code used as a function of the ECC operation, the matrix is expressed in compressed sparse row (CSR) format, and a sparse matrix-vector product is used. The multiplication operation is performed in the kernel of the GPU, and we also accelerate the Hamming code computation so that the ECC operation can be performed in parallel. The proposed technique is implemented with CUDA on a GPU-embedded target board, NVIDIA Jetson TX2, and compared with execution time of the CPU.

• Journal of applied mathematics & informatics
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• 제29권5_6호
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• pp.1603-1608
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• 2011

Let R be a ring with identity. If a, b, $c{\in}R$ such that a+b+c = 1, then the distributive laws from addition over multiplication hold in R, that is a+(bc) = (a+b)(a+c) when ab = ba, and (ab)+c = (a+c)(b+c) when ac = ca. An application to obtains, if A,B are idempotent matrices and AB = BA = 0 then there exists an idempotent matrix C such that A + BC = (A + B)(A + C), and also A + BC = (I - C)(I - B). Some other cases and applications are also presented.

• 전자공학회논문지B
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• 제30B권2호
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• pp.44-50
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• 1993

In this paper, we will present an array processor for implementation of digital neural networks. Back-propagation model can be formulated as a consecutive matrix-vector multiplication problem with some prespecified thresholding operation. This operation procedure is suited for the design of an array processor, because it can be recursively and repeatedly executed. Systolic array circuit architecture with Residue Number System is suggested to realize the efficient arithmetic circuit for matrix-vector multiplication and compute sigmoid function. The proposed design method would expect to adopt for the application field of neural networks, because it can be realized to currently developed VLSI technology.

• Plant Biotechnology Reports
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• 제4권1호
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• pp.85-94
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• 2010

In vitro shoot regeneration of gladiolus in three different culture systems, viz., semi-solid agar (AS), membrane raft (MR), and duroplast foam liquid (DF) cultures was evaluated following the kinetics of shoot multiplication and hyperhydricity at optimized growth regulator combinations. Compared to the AS system, matrixsupported liquid cultures enhanced shoot multiplication. The peak of shoot multiplication rate was attained at 18 days of incubation in the MR and DF systems, whereas the maximum rate in the AS system was attained at 21 days. An early decline in acceleration trend was observed in liquid cultures than the AS culture. The hyperhydric status of the regenerated shoots in the different culture systems was assessed in terms of stomatal attributes and antioxidative status. Stomatal behavior appeared to be normal in the AS and MR systems. However, structural anomaly of stomata such as large, round shaped guard cells with damage in bordering regions of stomatal pores was pronounced in the DF system along with a relatively higher $K^+$ ion concentration than in the AS and MR systems. Antioxidative status of regenerated shoots was comparable in the AS and MR systems, while a higher incidence of oxidative damages of lipid membrane as evidenced from malondialdehyde and ascorbate content was observed in the DF system. Higher oxidative stress in the DF system was also apparent by elevated activities of superoxide dismutase, ascorbate peroxidase, and catalase. Among the three culture systems, liquid culture with MR resulted in maximum shoot multiplication with little or no symptoms of hyperhydricity. Shoots in the DF system were more prone to hyperhydricity than those in the AS and MR systems. The use of matrix support such as membrane raft as an interface between liquid medium and propagating tissue could be an effective means for rapid and efficient mass propagation with little or no symptoms of hyperhydricity.

• 융복합기술연구소 논문집
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• 제8권1호
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• pp.15-20
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• 2018

Recently a GPU has acquired programmability to perform general purpose computation fast by running thousands of threads concurrently. This paper presents a parallel GPU computation algorithm for dense matrix-matrix addition and scalar multiplication using OpenGL compute shader. It can play a very important role as a fundamental building block for many high-performance computing applications. Experimental results on NVIDIA Quad 4000 show that the proposed algorithm runs 21 times faster than CPU algorithm and achieves performance of 16 GFLOPS in single precision for dense matrices with size 4,096. Such performance proves that our algorithm is practical for real applications.

• ETRI Journal
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• 제31권2호
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• pp.129-139
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• 2009

This paper provides an efficient algorithm for computing the ${\eta}_T$ pairing on supersingular elliptic curves over fields of characteristic two. In the proposed algorithm, we deploy a modified multiplication in $F_{2^{4n}}$ using the Vandermonde matrix. For F, G ${\in}$ $F_{2^{4n}}$ the proposed multiplication method computes ${\beta}{\cdot}F{\cdot}G$ instead of $F{\cdot}G$ with some ${\beta}$ ${\in}$ $F^*_{2n}$ because ${\beta}$ is eliminated by the final exponentiation of the ${\eta}_T$ pairing computation. The proposed multiplication method asymptotically requires only 7 multiplications in $F_{2^n}$ as n ${\rightarrow}$ ${\infty}$, while the cost of the previously fastest Karatsuba method is 9 multiplications in $F_{2^n}$. Consequently, the cost of the ${\eta}_T$ pairing computation is reduced by 14.3%.

• 한국항공우주학회지
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• 제47권1호
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• pp.75-80
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• 2019

최근 항공우주 및 방위산업 분야에서 다양한 임베디드 시스템들의 소형화 및 저가화 개발이 많이 요구되고 있다. 본 논문에서는 고속 DSP를 이용하여 임베디드 시스템을 개발한다. 또한 비행 조종과 같은 고정밀 알고리즘의 연산시간을 줄이기 위해 행렬 곱을 위한 두 가지 알고리즘을 제안하고 구현한다. 개발한 임베디드 시스템을 이용하여 성능을 검증한 결과, $2{\times}2$ 단위 계산방법을 이용한 기존 방법과 성능을 비교했을 때 첫 번째 제안방법은 행렬의 사이즈가 작을 때 성능이 개선된다. 두 번째 제안방법은 $2{\times}2$ 단위 계산방법보다 전체적으로 성능이 우세하다.