• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1996년도 추계학술대회 논문집
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• pp.93-96
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• 1996

We developed three dimensional Monte carlo ion implantation simulator which simulate distributions of impurities under the ion implantation on the tilted multi-layered layer. Our simulation reveals three dimensional shadow effect and sidewall scattering effect due to the geometrical shapes. For the evaluation of the developed three dimensional Monte carlo ion implantation simulator, calculations with 100,000 ions have been performed for the island and hole structures with a thin oxide of 100$\AA$ and nitride of 2000$\AA$. The simulation results showed that the distribution of ion decreases near the conner of the hole structure covered with a nitride layer and increases near the conner for the island structure open to oxide. Moreover, three dimensional distributions of ions were obtained with varying incident energy, tilt and rotation angle, mask depth and three-dimensional structure geometry.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.428-428
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• 2013

Red color light emitting diodes were fabricated using CdSe/CdS/ZnS quantum dots (QDs). Patterned indium-tin-oxide (ITO) was used as a transparent anode, and oxygen plasma treatment on a surface of ITO was performed. Poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) was spin coated on the ITO surface as a hole injection layer. Then CdSe/CdS/ZnS QDs was spin coated and thermal treatment was performed for the cross-linking of QDs. TiO2 was coated on the QDs as an electron transport layer, and 150 nm of aluminum cathode was formed using thermal evaporator and shadow mask. The device shows a pure red color emission at 606 nm wavelength. Device characteristics will be presented in detail.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.717-720
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• 2007

We fabricated the 3.5 inch QCIF AMOLED panel with ultra low temperature polycrystalline silicon TFT on the plastic substrate. To reduce the leakage current, we used the triple layered gate metal structure. To reduce the stress from inorganic dielectric layer, we applied the organic interlayer dielectric and the photoactive insulating layer. By using the interlayer dielectric as a capacitor, the mask steps are reduced up to five.

• 한국전기전자재료학회논문지
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• 제14권11호
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• pp.874-878
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• 2001

Solder bump was electroplated on wafer for flip chip application. The process is as follows. Ti/Cu were sputtered and thick PR was formed by several coating PR layer. Fine pitch vias were opened using via mask and then Cu stud and solder bump were electroplated. Finally solder bump was formed by reflow process. In this paper, we opened 40㎛ vias on 57㎛ thick PR layer and electroplated solder bump with 70㎛ height and 40㎛ diameter. After reflow process, we could form solder bump with 53㎛ height and 43㎛ diameter. In plating process, we improved the plating uniformity within 3% by using ring contact instead of conventional multi-point contact.

• 한국정밀공학회지
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• 제21권5호
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• pp.24-31
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• 2004

Masking effect of the nanoscratched silicon (100) surface was studied and applied to a maskless nanofabrication technique. First, the surface of the silicon (100) was machined by ductile-regime nanomachining process using the scratch option of the Nanoindenter${ \circledR}$ XP. To clarify the possibility of the nanoscratched silicon surfaces for the application to wet etching mask, the etching characteristic with a KOH solution was evaluated at room temperature. After the etching process, the convex nanostructures were made due to the masking effect of the mechanically affected layer. Moreover, the height and the width of convex structures were controlled with varying normal loads during nanoscratch.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제15권2호
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• pp.786-799
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• 2021

Road damage detection is important for road maintenance. With the development of deep learning, more and more road damage detection methods have been proposed, such as Fast R-CNN, Faster R-CNN, Mask R-CNN and RetinaNet. However, because shallow and deep layers cannot be extracted at the same time, the existing methods do not perform well in detecting objects with fewer samples. In addition, these methods cannot obtain a highly accurate detecting bounding box. This paper presents a Multi-level Feature Pyramids method based on M2det. Because the feature layer has multi-scale and multi-level architecture, the feature layer containing more information and obvious features can be extracted. Moreover, an attention mechanism is used to improve the accuracy of local boundary boxes in the dataset. Experimental results show that the proposed method is better than the current state-of-the-art methods.

• 대한전자공학회논문지
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• 제23권6호
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• pp.801-806
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• 1986

The effect of SiH2Cl2 -HCl gas on the growth rate of epitaxial layer is studied. The temperature, pressure and gas mixing ratio of SiH2Cl2 and HCl are varied to study the growth rate dependence and selective Si epitaxy. The P-n junction diode is fabricated on the epitaxial layer and electrical characteristics are examined. Also, using selective Si epitaxy, a possibility of thin dielectric isolation process, that gives an independent isolation width on the mask dimension, is examined.

• 한국전기전자재료학회논문지
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• 제18권5호
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• pp.389-395
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• 2005

The etching technology of the high aspect ratio contact(HARC) is necessary at the critical contact processes of semiconductor devices. Etching the $SiO_{2}$ contact hole with the sub-micron design rule in manufacturing VLSI devices, the unexpected phenomenon of 'profile tilting' or 'bottom distortion' is often observed. This makes a short circuit between neighboring contact holes, which causes to drop seriously the device yield. As the aspect ratio of contact holes increases, the high C/F ratio gases, $C_{4}F_{6}$, $C_{4}F_{8}$ and $C_{5}F_{8}$, become widely used in order to minimize the mask layer loss during the etching process. These gases provide abundant fluorocarbon polymer as well as high selectivity to the mask layer, and the polymer with high sticking yield accumulates at the top-wall of the contact hole. During the etch process, many electrons are accumulated around the asymmetric hole mouth to distort the electric field, and this distorts the ion trajectory arriving at the hole bottom. These ions with the distorted trajectory induce the deformation of the hole bottom, which is called 'profile tilting' or 'bottom distortion'. To prevent this phenomenon, three methods are suggested here. 1) Using lower C/F ratio gases, $CF_{4}$ or $C_{3}F_{8}$, the amount of the Polymer at the hole mouth is reduced to minimize the asymmetry of the hole top. 2) The number of the neighboring holes with equal distance is maximized to get the more symmetry of the oxygen distribution around the hole. 3) The dual frequency plasma source is used to release the excessive charge build-up at the hole mouth. From the suggested methods, we have obtained the nearly circular hole bottom, which Implies that the ion trajectory Incident on the hole bottom is symmetry.

• 대한기계학회논문집B
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• 제36권11호
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• pp.1135-1140
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• 2012

마스크를 이용하여 니켈 시드층의 형성 후 실버 도금을 통해 태양전지 상부전극을 형성하는 2 단계 전극형성 공정이 태양전지의 고효율화 방안으로 제안되었다. 본 연구에서는, 자외선 경화형 혹은 상변화 잉크를 고비용의 인쇄공정을 통해 마스크를 형성하는 방법을 대신하여, 코팅과 레이저의 복합공정을 통해 마스크를 형성하는 방법에 대해 제안하도록 한다. 마스크를 형성하는 물질로서 저비용의 저융점 왁스 혹은 플루오르카본 용액을 태양전지 웨이퍼 상에 코팅 후 레이저로 선택적으로 제거하여 전극패턴을 형성하였으며, 플루오르카본 용액 코팅이 왁스 코팅보다 패턴 균일도 측면에서 우수할 뿐만 아니라 통계적으로 0.16% 태양전지 효율증대를 유발한다는 점이 발견되었다.

• Journal of Electrical Engineering and Technology
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• 제4권4호
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• pp.546-551
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• 2009

In this paper, we describe a self-aligned fabrication method for a nano-patterned bottom electrode using flood exposure from the backside. Misalignments between layers could cause the final devices to fail after the fabrication of the nano-scale bottom electrodes. A self-alignment was exploited to embed the bottom electrode inside the glass substrate. Aluminum patterns act as a dry etching mask to fabricate glass trenches as well as a self-aligned photomask during the flood exposure from the backside. The patterned photoresist (PR) has a negative sidewall slope using the flood exposure. The sidewall slopes of the glass trench and the patterned PR were $54.00^{\circ}$ and $63.47^{\circ}$, respectively. The negative sidewall enables an embedment of a gold layer inside $0.7{\mu}m$ wide glass trenches. Gold residues on the trench edges were removed by the additional flood exposure with wet etching. The sidewall slopes of the patterned PR are related to the slopes of the glass trenches. Nano-scale bottom electrodes inside the glass trenches will be used in beam resonators operating at high resonant frequencies.