DOI QR코드

DOI QR Code

높은 A/R의 콘택 산화막 에칭에서 바닥모양 변형 개선에 관한 연구

A Study on The Improvement of Profile Tilting or Bottom Distortion in HARC

  • 황원태 (삼성전자 반도체연구소) ;
  • 김길호 (성균관대학교 나노소자 연구실)
  • 발행 : 2005.05.01

초록

The etching technology of the high aspect ratio contact(HARC) is necessary at the critical contact processes of semiconductor devices. Etching the $SiO_{2}$ contact hole with the sub-micron design rule in manufacturing VLSI devices, the unexpected phenomenon of 'profile tilting' or 'bottom distortion' is often observed. This makes a short circuit between neighboring contact holes, which causes to drop seriously the device yield. As the aspect ratio of contact holes increases, the high C/F ratio gases, $C_{4}F_{6}$, $C_{4}F_{8}$ and $C_{5}F_{8}$, become widely used in order to minimize the mask layer loss during the etching process. These gases provide abundant fluorocarbon polymer as well as high selectivity to the mask layer, and the polymer with high sticking yield accumulates at the top-wall of the contact hole. During the etch process, many electrons are accumulated around the asymmetric hole mouth to distort the electric field, and this distorts the ion trajectory arriving at the hole bottom. These ions with the distorted trajectory induce the deformation of the hole bottom, which is called 'profile tilting' or 'bottom distortion'. To prevent this phenomenon, three methods are suggested here. 1) Using lower C/F ratio gases, $CF_{4}$ or $C_{3}F_{8}$, the amount of the Polymer at the hole mouth is reduced to minimize the asymmetry of the hole top. 2) The number of the neighboring holes with equal distance is maximized to get the more symmetry of the oxygen distribution around the hole. 3) The dual frequency plasma source is used to release the excessive charge build-up at the hole mouth. From the suggested methods, we have obtained the nearly circular hole bottom, which Implies that the ion trajectory Incident on the hole bottom is symmetry.

키워드

참고문헌

  1. Gray S. May, J. Huang, and Costas J. Spanos, 'Statistical experimental design in plasma etch modeling', IEEE transactions on semiconductor manufacturing, Vol. 4, No.2, p. 83, 1991
  2. M. Inayoshi, M. Ito, M. Hori, T. Goto, and M. Hiramatsu, 'Surface reaction of $CF_2$ radicals for fluorocarbon film formation in $SiO_2/Si$ selective etching process', J. Vacuum Science Technology A, Vacuum Surface Films, Vol. 16, p. 233, 1998 https://doi.org/10.1116/1.581209
  3. Thomas S. Rupp, D. Dobuzinsky, Z. Lu, and J. Gambino, 'High yielding self-aligned contact process for a 0.150 ${\mu}m$ DRAM technology', IEEE transactions on semiconductor manufacturing, Vol. 15, No.2, p. 223, 2002
  4. W. Graf, D. Basso, F. Gaurier, J. M. Martin, and G. Skinner, 'Highly selective oxide to nitride etch processes on BPSG/Nitride/Oxide structures in a MERIE etcher', IEEE/SEMI Advanced Semiconductor Manufacturing Conference, p. 314, 1998 https://doi.org/10.1109/ASMC.1998.731580
  5. C. Liu and B. Abraham-shrauner, 'Plasmaetching profile model for $SiO_2/Si$ contact holes', IEEE transactions on Plasma Science, Vol. 30, No.4, p. 1579, 2002
  6. H. Ohtake, S. Samukawa, and K. Noguchi, 'Pulse-time-modulated plasma etching for high performance polysilicon patterning on thin gate oxide', 4th International Symposium on Plasma Process-induced Damage, p. 37, 1999
  7. J. Bariya, C. W. Frank, and J. P. McVittie, 'A surface kinetic model for plasma polymerization with application to plasma etching', J. Electrochemical Society, Vol. 137, p. 2575, 1990 https://doi.org/10.1149/1.2086846
  8. T. Tatsumi, Y. Hikosaka, S. morishita, and M. Seckine, 'Etch rate control in a 27 MHz reactive ion etching system for ultralarge scale integrated circuit processing', J. Vacuum Science Technology, A. Vacuum Surface Films, Vol. 17, p. 1562, 1999
  9. Technical Conference SAMSUNG-TEL (Tokyo Electric Ltd.) 'Mechanism of Dual Frequency CCP in VESTA', p. 5, 2003