• Title/Summary/Keyword: MFSFET

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Design of the Adaptive Learning Circuit by Enploying the MFSFET (MFSFET 소자를 이용한 Adaptive Learning Curcuit 의 설계)

  • Lee, Kook-Pyo;Kang, Seong-Jun;Chang, Dong-Hoon;Yoon, Yung-Sup
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.8
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    • pp.1-12
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    • 2001
  • The adaptive learning circuit is designed on the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results are analyzed. The output frequency of the adaptive learning circuit is inversely proportional to the source-drain resistance of MFSFET and the capacitance of the circuit. The saturated drain current with input pulse number is analogous to the ferroelectric polarization reversal. It indicates that the ferroelectric polarization plays an important role in the drain current control of MFSFET. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of input pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, the frequency modulation characteristic of the adaptive learning circuit are confirmed. In other words, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse are confirmed. Consequently it is shown that our circuit can be used effectively in the neuron synapses of nueral networks.

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Characteristics of Ferroelectric-Gate MFISFET Device Behaving to NDRO Configuration (NDRD 방식의 강유전체-게이트 MFSFET소자의 특성)

  • 이국표;강성준;윤영섭
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.1
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    • pp.1-10
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    • 2003
  • Device characteristics of the Metal-Ferroclecric-Semiconductor FET(MFSFET) are simulated in this study. The field-dependent polarization model and the square-law FET model are employed in our simulation. C-V$_{G}$ curves generated from our MFSFET simulation exhibit the accumulation, the depletion and the inversion regions clearly. The capacitance, the subthreshold and the drain current characteristics as a function of gate bias exhibit the memory windows are 1 and 2 V, when the coercive voltages of ferroelectric are 0.5 and 1 V respectively. I$_{D}$-V$_{D}$ curves are composed of the triode and the saturation regions. The difference of saturation drain currents of the MFSFET device at the dual threshold voltages in I$_{D}$-V$_{D}$ curve is 1.5, 2.7, 4.0, and 5.7 ㎃, when the gate biases are 0, 0.1, 0.2 and 0.3V respectively. As the drain current is demonstrated after time delay, PLZT(10/30/70) thin film shows excellent reliability as well as the decrease of saturation current is about 18 % after 10 years. Our simulation model is expected to be very useful in the estimation of the behaviour of MFSFET devices.T devices.

Adaptive Learning Circuit For Applying Neural Network (뉴럴 네트워크의 적용을 위한 적응형 학습회로)

  • Lee, Kook-Pyo;Pyo, Chang-Soo;Koh, Si-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.3
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    • pp.534-540
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    • 2008
  • The adaptive learning circuit is designed on the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results is analyzed. The output frequency of the adaptive learning circuit is inversely proportional to the source-drain resistance of MFSFET and the capacitance of the circuit. The saturated drain current with input pulse number is analogous to the ferroelectric polarization reversal. It indicates that the ferroelectric polarization plays an important role in the drain current control of MFSFET. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of input pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse, are confirmed. Consequently it is shown that our circuit can be used effectively in the neuron synapses of neural networks.

Adaptive Learning Circuit of Neural Network applying the MFSFET device (MFSFET 소자를 이용한 뉴럴 네트워크의 적응형 학습회로)

  • 이국표;강성준;윤영섭
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.36-39
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    • 2000
  • The adaptive learning circuit is designed the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results is analyzed. The output frequency of the adaptive learning circuit is inversely proportioned to the source-drain resistance of MFSFET and the capacitance of the circuit. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of imput pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, the frequency modulation characteristics of the adaptive learning circuit, that is, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse are confirmed.

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Study on Oscillation Circuit Using CUJT and PUT Device for Application of MFSFET′s Neural Network (MFSFET의 신경회로망 응용을 위한 CUJT와 PUT 소자를 이용한 발진 회로에 관한 연구)

  • 강이구;장원준;장석민;성만영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.06a
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    • pp.55-58
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    • 1998
  • Recently, neural networks with self-adaptability like human brain have attracted much attention. It is desirable for the neuron-function to be implemented by exclusive hardware system on account of huge quantity in calculation. We have proposed a novel neuro-device composed of a MFSFET(ferroelectric gate FET) and oscillation circuit with CUJT(complimentary unijuction transistor) and PUT(programmable unijuction transistor). However, it is difficult to preserve ferroelectricity on Si due to existence of interfacial traps and/or interdiffusion of the constitutent elements, although there are a few reports on good MFS devices. In this paper, we have simulated CUJT and PUT devices instead of fabricating them and composed oscillation circuit. Finally, we have resented, as an approach to the MFSFET neuron circuit, adaptive learning function and characterized the elementary operation properties of the pulse oscillation circuit.

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Fabrication and Properties of MFSFET′s using LiNbO$_3$ film (LiNbO$_3$를 이용한 MFSFET의 제작 및 특성)

  • 정순원;김채규;이상우;김광호
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.06a
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    • pp.63-66
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    • 1998
  • Prototype MFSFET′s using ferroelectric oxide LiNbO$_3$ as a gate insulator have been successfully fabricated with the help of 2 sheets of metal masks and demonstrated nonvolatile memory operations of the MFSFET′s. The estimated field-effect electron mobility and transconductance on a linear region of the fabricated FET were 600 $\textrm{cm}^2$/V.s and 0.16 mS/mm, respectively. The drain current of the "on" state was more than 4 orders of magnitude larger than the "off" state current at the same "read" gate voltage of 0.5 V, which means the memory operation of the MFSFET. A write voltage as low as $\pm$3 V, which is applicable to low power integrate circuits, was used for polarization reversal.

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Fabrication and Properties of MFSFET′s Using $BaMgF_4$/Si Structures for Non-volatile Memory ($BaMgF_4$/Si 구조를 이용한 비휘발성 메모리용 MFSFET의 제작 및 특성)

  • 이상우;김광호
    • Electrical & Electronic Materials
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    • v.10 no.10
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    • pp.1029-1033
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    • 1997
  • A prototype MFSFET using ferroelectric fluoride BaMgF$_4$as a gate insulator has been successfully fabricated with the help of 2 sheets of metal mask. The fluoride film was deposited in an ultrai-high vacuum system at a substrate temperature of below 30$0^{\circ}C$ and an in-situ post-deposition annealing was conducted for 20 seconds at $650^{\circ}C$ in the same chamber. The interface state density of the BaMgF$_4$/Si(100) interface calculated by a MFS capacitor fabricated on the same wafer was about 8$\times$10$^{10}$ /cm$^2$.eV. The I$_{D}$-V$_{G}$ characteristics of the MFSFET show a hysteresis loop due to the ferroelectric nature of the BaMgF$_4$film. It is also demonstrated that the I$_{D}$ can be controlled by the “write” plus which was applied before the measurements even at the same “read”gate voltage.ltage.

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Device Characteristics of MFSFET with the Fatigue of the Ferroelectric Thin Film (강유전박막의 피로현상을 고려한 MFSFET 소자의 특성)

  • 이국표;강성준;윤영섭
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.191-194
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    • 1999
  • Switching behaviour of the ferroelectric thin film and device characteristics of the MFSFET (Metal-Ferroelectric-Semiconductor FET) are simulated with taking into account the accumulation of oxygen vacancies near interface between the ferroelectric thin film and the bottom electrode caused by the progress of fatigue. We show net switching current decreases due fatigue in the switching model. It indicates that oxygen vacancy strongly suppresses polarization reversal. The difference of saturation drain current of the device before fatigue is shown by the dual threshold voltages in I$_{D}$-V$_{D}$ curve as 6㎃/$\textrm{cm}^2$ and decreases as much as 50% after fatigue. Our simulation model is expected to play an important role in estimation of the behavior of MFSFET device with various ferroelectric thin films.lms.

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Electrode dependences of MFSFET Characteristics using BaMgF$_4$ Thin Films (BaMgF$_4$박막을 이용한 MFSFET특성의 전극의존성)

  • 김채규;정순원;김진규;김용성;이남열;김광호;유병곤;이원재
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.465-468
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    • 1999
  • Electrical properties of metal-ferroelectric-semiconductor field effect transistor(MFSFET) using $BaMgF_4$ thin films grown on p-Si(100) substrates have been investigated. $BaMgF_4$ thin films have been directly deposited on the p-Si(100) wafers at a low temperature of $300^{\circ}C$ in an ultra high vacuum(UHV) system. First an in-situ post-deposition annealing was conducted for 20s at $650^{\circ}C$ and second an in-situ post-annealing was conducted for 10s at $950^{\circ}C$. The electrical properties of MFSFET compared with using A1 and Pt electrodes.

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Electrical and Retention Properties of MFSFET Device (MFSFET 소자의 전기적 및 리텐션 특성)

  • Chung, Yeun-Gun;Kang, Seong-Jun;Joung, Yang-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.3
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    • pp.570-576
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    • 2007
  • In this study, the characteristics of metal-ferroelectric-semiconductor FET (MFSFET) device is investigated using field-dependent polarization and square-law FET models. From drain current with the gate voltage variation, when coercive voltages of ferroelectric thin film are 0.5 and 1V, the memory windows are 1 and 2V, respectively. When the gate voltages are 0, 0.1, 0.2 and 0.3V, the difference of saturation drain currents of the MFSFET device at two threshold voltages in ID-VD curve are 1.5, 2.7, 4.0, and 5.7mA, respectively. As a result of the analysis for drain currents after tine lapse, which is based on the simulation for hysteresis loop and the fitting of retention properties of ferroelectric thin films such as PLZT(10/30/70), PLT(10) and PZT(30/70) thin film shows excellent reliability that the decrease of saturation current is about 18% after 10 years.