• Journal of IKEEE
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• v.17 no.3
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• pp.267-274
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• 2013

This paper presents a design of LLC resonant converter IC for LED backlight unit based on PFM/PWM dual-mode feedback. Dual output LLC resonant architecture with a single inductor is proposed, where the master output is controlled by the PFM and slave output is controlled by the PWM. To regulate the master output PFM is used as feedback to control the frequency of the power switch. On the other hand, PWM feedback is used to control the pulse width of the power switch and to regulate the slave output. This chip is fabricated in 0.35um 2P3M BC(Bipolar-CMOS-DMOS) Process and the die area is $2.3mm{\times}2.2mm$. Current consumptions is 26mA from 5V supply.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.3
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• pp.103-109
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• 2013

Miller-Rabin method is the most prevalently used primality test. However, this method mistakenly reports a Carmichael number or semi-prime number as prime (strong lier) although they are composite numbers. To eradicate this problem, it selects k number of m, whose value satisfies the following : m=[2,n-1], (m,n)=1. The Miller-Rabin method determines that a given number is prime, given that after the computation of $n-1=2^sd$, $0{\leq}r{\leq}s-1$, the outcome satisfies $m^d{\equiv}1$(mod n) or $m^{2^rd}{\equiv}-1$(mod n). This paper proposes a step-by-step primality testing algorithm that restricts m=2, hence achieving 98.8% probability. The proposed method, as a first step, rejects composite numbers that do not satisfy the equation, $n=6k{\pm}1$, $n_1{\neq}5$. Next, it determines prime by computing $2^{2^{s-1}d}{\equiv}{\beta}_{s-1}$(mod n) and $2^d{\equiv}{\beta}_0$(mod n). In the third step, it tests ${\beta}_r{\equiv}-1$ in the range of $1{\leq}r{\leq}s-2$ for ${\beta}_0$ > 1. In the case of ${\beta}_0$ = 1, it retests m=3,5,7,11,13,17 sequentially. When applied to n=[101,1000], the proposed algorithm determined 96.55% of prime in the initial stage. The remaining 3% was performed for ${\beta}_0$ >1 and 0.55% for ${\beta}_0$ = 1.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.1-6
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• 2005

A dual-level low voltage differential signalling (DLVDS) circuit is proposed aiming at reducing transmission lines for LCD driver IC. In the proposed circuit, we apply a couple of primitive data to DLVDS circuit as inputs. The transmitter converts two inputs to two kinds of fully differential level signals. In this circuit, two transmission lines are sufficient to transfer two primitive inputs while keeping the LVDS feature. The receiver recovers The original input data through a level decoding circuit. We fabricated the proposed circuit using $0.25\mu m$ CMOS technology. The resultant circuit shows 1-Gbps/2-line data rate and 35-mW power consumption at 2.5V supply voltage, respectively.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.5
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• pp.2272-2278
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• 2011

It is essential to various evaluate about statistic character of the signal and additional noise for optimization of the optical communication system. We expressed various error probability with the m which was bandwidth and a bit numerical function and carried out performance evaluation of a PIN receiver. This research analyzed the receiving sensitivity of the PIN receiver and verified reception sensitivity through computer simulation in the optical communication system. As a result, the receiving sensitivity for PIN receiver are $9.2{\times}10^4$ photon/bit for given error probability.

• Transactions on Electrical and Electronic Materials
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• v.12 no.6
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• pp.253-257
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• 2011

This study was carried out to solve problems such as radio frequency band depletion, confusion risk, and security loss in existing visible wireless communication systems, and to determine the applicability of next-generation networks. A light-emitting diode (LED) light communication system was implemented with a controlling switching light module using the ATmega16 micro-controller. To solve the existing modulation effect and disturbance in visible light communication, an integrated interface was evaluated with a driving light module and analyzes its reception property. A transmitter/receiver using the ATmel's micro-controller, high-intensity white LED-6 modules, and infrared sensor KSM60WLM and visible sensor TSL250RD were designed. An experiment from the initial value of distance to 2.5 m showed 0.46 V of the voltage loss, and if in long distance, external light interference occurred and light intensity was lost by external impact and thus data had to be modified or reset repeatedly. Additionally, when we used 6 modules through the remote controller's lighting dimming, data could be transmitted up to 1.76 m without any errors during the day and up to 2.29 m at night with around 2~3% communication error. If a special optical filter can reduce as much external light as possible in the integrated interface, the LED for lighting communication systems may be applied in next generation networks.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.9
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• pp.1538-1544
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• 2006

This paper proposes a non-systolic parallel $AB^2+C$ Computing unit based on irreducible AOP order m of $GF(2^m)$. Proposed circuit have only AND gates and EX-OR gates, composes of cyclic shift operation, multiplication operation power operation power-sum operation and addition operation using a merry irreducible AOP. Suggested operating a method have an advantage high speed data processing, low power and integration because of only needs AND gates and EX-OR gates. $AB^2+C$ computing unit has delay-time of $T_A+(1+[log^m_2])T_X$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.7
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• pp.1202-1207
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• 2006

In this paper we analyze the performance improvement of the M-ary FSK systems for low power and low data rate applications. This contribution presents a unified analysis of its MRC diversity, uncoded and performance in A WGN, m=2, m=3, Rayleigh and one sided Gaussian fading channels using optimum noncoherent demodulation with Reed-Solomon(RS) codes. The results of this paper should be useful as benchmarks of obtainable performance and as a reference for validating the results of simulation studies when slow fading models are applicable.

• The Journal of the Korea institute of electronic communication sciences
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• v.15 no.2
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• pp.327-334
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• 2020

In this paper, an automatic cruise system of unmanned boat was developed for surveying water depth in reservoir using accurate location information. Using global satellite navigation system(GNSS) data in real time, this unmanned system, combined with an echo sounder, can simultaneously collect location information and depth information on the reservoir. This automatic navigation system allows the automatic route generation program to automatically generate a cruise route according to the input conditions for grid sizes of 5m, 10m and 20m, and automatically controls the cruise route with high positional accuracy. The developed system was tested to verify the applicability of the selected Yonggok(Geoncheon) reservoir as a test reservoir located in Suncheon, Jeollanam-do.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.5
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• pp.159-164
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• 2022

The linear assignment problem (LAP) and linear bottleneck assignment problem (LBAP) has been unknown the algorithm to solve the optimal solution within polynomial-time. These problems are classified by NP-hard. Therefore, we can be apply metaheuristic methods or linear programming (LP) software package or Hungarian algorithm (HA) with O(m⁴) computational complexity. This paper suggests polynomial time algorithm with O(mn)=O(m²),m=n time complexity to LAP and LBAP. The select-delete method is simply applied to LAP, and the delete-select method is used to LBAP. For the experimental data without the unique algorithm can be apply to whole data, the proposed algorithm can be obtain the optimal solutions for whole data.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.2
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• pp.23-29
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• 2015

The baby-step giant-step algorithm seeks b in a discrete logarithm problem when a,c,p of $a^b{\equiv}c$(mod p) are already given. It does so by dividing p by m block of $m={\lceil}{\sqrt{p}}{\rceil}$ length and letting one giant walk straight toward $a^0$ with constant m strides in search for b. In this paper, I basically reduce $m={\lceil}{\sqrt{p}}{\rceil}$ to p/l, $a^l$ > p and replace a giant with an adult who is designed to walk straight with constant l strides. I also extend the algorithm to allow $2^k$ adults to walk simultaneously. As a consequence, the proposed algorithm quarters the execution time of the basic adult-walk method when applied to $2^k$, (k=2) in the range of $1{\leq}b{\leq}p-1$. In conclusion, the proposed algorithm greatly shorten the step number of baby-step giant-step.