• Title/Summary/Keyword: M/W Band

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Design of a CMOS LNA for MB-OFDM UWB Systems (MB-OFDM 방식의 UWB 시스템을 위한 CMOS LNA 설계)

  • Lee Jae-kyoung;Kang Ki-sub;Park Jong-tae;Yu Chong-gun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.1
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    • pp.117-122
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    • 2006
  • A CMOS LNA based on a single-stage cascode configuration is designed for MB-OFDM ultra-wide band(UWB) systems. Wideband($3.1GHz\~4.9GHz$) input matching is performed using a simple bandpass filter to minimize the chip size and the noise figure degradation. The simulation results using $0.18{\mu}m$ CMOS process parameters show a power gain of 9.7dB, a 3dB band width of $2.1GHz\~7.1GHz$, a minimum NF of 2dB, an IIP3 of -2dBm. better than -11.8dB of input matching while occupying only $0.74mm^2$ of chip area. It consumes 25.8mW from a 1.8V supply.

A $2{\sim}6GHz$ Wide-band CMOS Frequency Synthesizer With Single LC-tank VCO (싱글 LC-탱크 전압제어발진기를 갖는 $2{\sim}6GHz$의 광대역 CMOS 주파수 합성기)

  • Jeong, Chan-Young;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.9
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    • pp.74-80
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    • 2009
  • This paper describes a $2{\sim}6GHz$ CMOS frequency synthesizer that employs only one LC-tank voltage controlled oscillator (VCO). For wide-band operation, optimized LO signal generator is used. The LC-tank VCO oscillating in $6{\sim}8GHz$ provides the required LO frequency by dividing and mixing the VCO output clocks appropriately. The frequency synthesizer is based on a fractional-N phase locked loop (PLL) employing third-order 1-1-1 MASH type sigma-delta modulator. Implemented in a $0.18{\mu}m$ CMOS technology, the frequency synthesizer occupies the area of $0.92mm^2$ with of-chip loop filter and consumes 36mW from a 1.8V supply. The PLL is completed in less than $8{\mu}s$. The phase noise is -110dBC/Hz at 1MHz offset from the carrier.

DEVELOPMENT OF THE MECHANICAL STRUCTURE OF THE MIRIS SOC (MIRIS 우주관측카메라의 기계부 개발)

  • Moon, B.K.;Jeong, W.S.;Cha, S.M.;Ree, C.H.;Park, S.J.;Lee, D.H.;Yuk, I.S.;Park, Y.S.;Park, J.H.;Nam, U.W.;Matsumoto, Toshio;Yoshida, Seiji;Yang, S.C.;Lee, S.H.;Rhee, S.W.;Han, W.
    • Publications of The Korean Astronomical Society
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    • v.24 no.1
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    • pp.53-64
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    • 2009
  • MIRIS is the main payload of the STSAT-3 (Science and Technology Satellite 3) and the first infrared space telescope for astronomical observation in Korea. MIRIS space observation camera (SOC) covers the observation wavelength from $0.9{\mu}m$ to $2.0{\mu}m$ with a wide field of view $3.67^{\circ}\times3.67^{\circ}$. The PICNIC HgCdTe detector in a cold box is cooled down below 100K by a micro Stirling cooler of which cooling capacity is 220mW at 77K. MIRIS SOC adopts passive cooling technique to chill the telescope below 200 K by pointing to the deep space (3K). The cooling mechanism employs a radiator, a Winston cone baffle, a thermal shield, MLI (Multi Layer Insulation) of 30 layers, and GFRP (Glass Fiber Reinforced Plastic) pipe support in the system. Optomechanical analysis was made in order to estimate and compensate possible stresses from the thermal contraction of mounting parts at cryogenic temperatures. Finite Element Analysis (FEA) of mechanical structure was also conducted to ensure safety and stability in launching environments and in orbit. MIRIS SOC will mainly perform Galactic plane survey with narrow band filters (Pa $\alpha$ and Pa $\alpha$ continuum) and CIB (Cosmic Infrared Background) observation with wide band filters (I and H) driven by a cryogenic stepping motor.

A Dual-Channel 6b 1GS/s 0.18um CMOS ADC for Ultra Wide-Band Communication Systems (초광대역 통신시스템 응용을 위한 이중채널 6b 1GS/s 0.18um CMOS ADC)

  • Cho, Young-Jae;Yoo, Si-Wook;Kim, Young-Lok;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.12 s.354
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    • pp.47-54
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    • 2006
  • This work proposes a dual-channel 6b 1GS/s ADC for ultra wide-band communication system applications. The proposed ADC based on a 6b interpolated flash architecture employs wide-band open-loop track-and-hold amplifiers, comparators with a wide-range differential difference pre-amplifier, latches with reduced kickback noise, on-chip CMOS references, and digital bubble-code correction circuits to optimize power, chip area, and accuracy at 1GS/s. The ADC implemented in a 0.18um 1P6M CMOS technology shows a signal-to-noise-and-distortion ratio of 30dB and a spurious-free dynamic range of 39dB at 1GS/s. The measured differential and integral non-linearities of the prototype ADC are within 1.0LSB and 1.3LSB, respectively. The dual-channel ADC has an active area of $4.0mm^2$ and consumes 594mW at 1GS/s and 1.8V.

Design of an 1.8V 6-bit 100MS/s 5mW CMOS A/D Converter with Low Power Folding-Interpolation Techniques (저 전력 Folding-Interpolation기법을 적용한 1.8V 6-bit 100MS/s 5mW CMOS A/D 변환기의 설계)

  • Moon Jun-Ho;Hwang Sang-Hoon;Song Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.8 s.350
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    • pp.19-26
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    • 2006
  • In this paper, CMOS analog-to-digital converter (ADC) with a 6-bit 100MSPS at 1.8V is described. The architecture of the proposed ADC is based on a folding type ADC using resistive interpolation technique for low power consumption. Further, the number of folding blocks (NFB) is decreased by half of them compared to the conventional ones. A moebius-band averaging technique is adopted at the proposed ADC to improve performance. With the clock speed of 100MSPS, the ADC achieves an effective resolution bandwidth (ERBW) of 50MHz, while consuming only 4.5mW of power. The measured result of figure-of-merit (FoM) is 0.93pJ/convstep. The INL and DNL are within ${\pm}0.5 LSB$, respectively. The active chip occupies an area of $0.28mm^2$ in 0.18um CMOS technology.

Design of Variable Gain Receiver Front-end with Wide Gain Variable Range and Low Power Consumption for 5.25 GHz (5.25 GHz에서 넓은 이득 제어 범위를 갖는 저전력 가변 이득 프론트-엔드 설계)

  • Ahn, Young-Bin;Jeong, Ji-Chai
    • Journal of IKEEE
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    • v.14 no.4
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    • pp.257-262
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    • 2010
  • We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)

A Study on the Characteristics Analysis and Design of High Sensitivity Silicon Photodiode for Laser Detector (레이저 검출용 고감도 실리콘 포토다이오드 제조 및 특성 분석에 관한 연구)

  • Lee, Jun-Myung;Kang, Eun-Young;Park, Keon-Jun;Kim, Yong-Kab
    • The Journal of the Korea institute of electronic communication sciences
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    • v.9 no.5
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    • pp.555-560
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    • 2014
  • In order to improve spectrum sensitivity of photodiode for detection of the laser wavelength at 850 nm ~ 1000 nm of near-infrared band, this study has produced silicon-based photodiode whose area is $5000{\mu}m{\times}2000{\mu}m$, and the thickness is $280{\mu}m$. It was packed by the TO-5 type. The electrical properties of the dark currents have valued of approximately 0.1 nA for 5 V reverse bias, while the capacitance showed 32.5 pF at frequency range of 1 kHz and about 32.4 pF at the range of 200 kHz for 0 V. In addition, the rising time of output signal was as fast response as 20.92 ns for 10V. For the optical properties, the best spectrum sensitivity was 0.57 A/W for 890 nm, while it was relatively excellent value of 0.37 A/W for 1,000 nm. Over all, there were good spectrum sensitivity for this diode over the range of 870 ~ 920 nm.

Design and Implementation of System in Package for a HF/UHF Multi-band RFID Reader (HF/UHF 멀티밴드 RFID 리더의 SiP 설계 및 구현)

  • An, Kwang-Dek;Yi, Kyeong-Il;Kim, Ji-Gon;Cho, Jung-Hyun;Kim, Shi-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.10
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    • pp.59-65
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    • 2008
  • We have proposed a UHF/HF multi-band RFID reader, and have implemented it into a system in a package(SiP). The proposed SiP RFID reader has been designed to support both for EPCgloabal Class1 Generation2 protocol of UHF band, and 13.56MHz RFID protocols of ISO14443 A/B type, and ISO15693 standards. The operating mode is controlled by embedded RISC core, and the mode can be selected by users. The area of implemented SiP is $40mm{\times}40mm$ with 4 metal layers. The implemented reader SiP operates at single supply voltage of 3.3V. The maximum current consumption is 210mA. The operating distances are 5cm for 13.56MHz modes, and 20cm for UHF mode.

Technical Trends in GaN RF Electronic Device and Integrated Circuits for 5G Mobile Telecommunication (5G 이동통신을 위한 GaN RF 전자소자 및 집적회로 기술 동향)

  • Lee, J.M.;Min, B.G.;Chang, W.J.;Ji, H.G.;Cho, K.J.;Kang, D.M.
    • Electronics and Telecommunications Trends
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    • v.36 no.3
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    • pp.53-64
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    • 2021
  • As the 5G service market is expected to grow rapidly, the development of high-power, high-efficiency power amplifiers for the 5G communication infrastructure is indispensable. Gallium nitride (GaN) is attracting great interest as a key device in power devices and integrated circuits due to its wide bandgap, high carrier concentration, high electron mobility, and high-power saturation characteristics. In this study, we investigate the technology trends of Ka-band GaN radio frequency (RF) power devices and integrated circuits for operation in the millimeter-wave band of recent 5G mobile communication services. We review the characteristics of GaN RF high electron mobility transistor (HEMT) devices to implement power amplifiers operating at frequencies around 28 GHz and compare the technology of foreign companies with the device characteristics currently developed by the Electronics and Telecommunication Research Institute (ETRI). In addition, the characteristics of Ka-band GaN monolithic microwave integrated circuit (MMIC) power amplifiers manufactured using various GaN HEMT device technologies are reviewed by comparing characteristics such as frequency band, output power, and output power density of integrated circuits. In addition, by comparing the performance of the power amplifier developed by ETRI, the current status and future direction of domestic GaN power devices and integrated circuit technology will be discussed.

Studies on IF noise caused by transmitter signal leakages of the W-band homodyne FMCW radar with a single antenna configuration (단일 안테나를 사용하는 W-대역 호모다인 FMCW 레이더의 누설신호에 의한 IF 잡음에 관한 연구)

  • Park Jung-Dong;Kim Wan-Joo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.7 s.337
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    • pp.49-56
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    • 2005
  • In this paper, we describe a solution to improve the effects of the transmitter leakage signals on the frequency modulated continuous wave (FMCW) radar with a single antenna configuration. We analyze characteristics of the IF noise caused by insufficient isolation between transmitter and receiver. The magnitude of the intermediate frequency (IF) noise from a front-end can be reduced by matching the LO signal delay time with that of the largest leakage source. Because the IF noise has periodic singularities at nT$_{m}$/2, t=0,1,2$\cdots$, we find that spectrum of the IF noise due to the leakage signals is very similar to that of the VCO moduation signal except low frequency elements in the vicinity of DC. Based on the studies, we fabricated a W-band homodyne FMCW radar sensor and verified the proposed solution. The results are applicable to design of the homodyne FMCW radar with a single antenna configuration.