• Title/Summary/Keyword: Lower Bound Estimation

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A relative nielsen number in coincidence theory

  • Jang, Chan-Gyu;Lee, Sik
    • Journal of the Korean Mathematical Society
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    • v.32 no.2
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    • pp.171-181
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    • 1995
  • Nielsen coincidence theory is concerned with the estimation of a lower bound for the number of coincidences of two maps $f,g: X \longrightarrow Y$. For this purpose the so-called Nielsen number N(f,g) is introduced, which is a lower bound for the number of coincidences ([1]). The relative Nielsen number N(f : X,A) in the fixed point theory is introduced in [3], which is a lower bound for the number of fixed points for all maps in the relative homotopy class of f:(X,A) $\longrightarrow$ (X,A), and its estimation is given in [5].

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Improving $L_1$ Information Bound in the Presence of a Nuisance Parameter for Median-unbiased Estimators

  • Sung, Nae-Kyung
    • Journal of the Korean Statistical Society
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    • v.22 no.1
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    • pp.1-12
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    • 1993
  • An approach to make the information bound sharper in median-unbiased estimation, based on an analogue of the Cramer-Rao inequality developed by Sung et al. (1990), is introduced for continuous densities with a nuisance parameter by considering information quantities contained both in the parametric function of interest and in the nuisance parameter in a linear fashion. This approach is comparable to that of improving the information bound in mean-unbiased estimation for the case of two unknown parameters. Computation of an optimal weight corresponding to the nuisance parameter is also considered.

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An Optimal Scheduling Method based upon the Lower Bound Cost Estimation (하한비용 추정에 바탕을 둔 최적 스케쥴링기법)

  • 엄성용;전주식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.28A no.12
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    • pp.73-87
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    • 1991
  • This paper presents a new approach to the scheduling problem in the high level synthesis. In this approach, iterative rescheduling processes starting with ASAP(As Soon As Possible) scheduling result are performed in a branch-and-bound manner so to arrive at the scheduling result of the lowest hardware cost under the given timing constraint. At each iteration step, only the selected nodes are considered for rescheduling, and the lower bound cost estimation is performed to avoid the unnecessary attempts to search for an optimal result. This branch-and-bound method turns out to be effective in pruning the search space, and thus reducing run time considerably in many cases.

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A Lower Bound Estimation on the number of LUT′s in Time-Multiplexed FPGA Synthesis (시분할 FPGA 합성에서 LUT 개수에 대한 하한 추정 기법)

  • Eom, Seong-Yong
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.7
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    • pp.422-430
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    • 2002
  • For a time-multiplexed FPGA, a circuit is partitioned into several subcircuits, so that they temporally share the same physical FPGA device by hardware reconfiguration. In these architectures, all the hardware reconfiguration information called contexts are generated and downloaded into the chip, and then the pre-scheduled context switches occur properly and timely. Since the maximum number of the LUT's required in the same time determines the size of the chip used in the synthesis, it needs to be minimized, if possible. Many previous work use their own approaches, which are very similar to either scheduling method in high level synthesis or multi-way circuit partitioning method, to solve the problem. In this paper, we propose a method which estimates the lower bound on the number of LUT's without performing any actual synthesis. The estimated lower bounds help to evaluate the results of the previous work. If the estimated lower bound on the number of LUT's exactly matches the number of LUT's of the result from the previous work, the result must be optimal. In contrast, if they do not match, the following two cases are expected : the more exact lower bound may exist, or we might find the new synthesis result better than the result from the previous work. Experimental results show that our lower bound estimation method is very accurate. In almost al] cases experimented, the estimated lower bounds on the number of LUT's exactly match those of the previous synthesis results respectively, implying that the best results from the previous work are optimal as well as our method predicted the exact lower bound for those examples.

Frequency Offset Estimation Technique for MB-OFDM Based UWB Systems (다중대역 직교 주파수 분할 다중 (MB-OFDM) 기반 초광대역(UWB) 시스템을 위한 주파수 오프셋 추정 기법)

  • Hwang, Hu-Mor;Rehman, Razi Ur
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.3
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    • pp.648-653
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    • 2011
  • We propose a new frequency offset estimation technique for multiband orthogonal frequency modulation (MB-OFDM) based ultra wideband (UWB) systems. The proposed frequency offset estimation technique is related to the scheme of Schmidl for channel model 1 (4-1Om NLOS, rms. delay =14.3ns.) using more than two symbols and with alternate symbols. Variance of frequency offset estimate obtained from the proposed frequency offset estimation technique approaches very nearing to Cramer Rao Lower Bound (CRLB) in an AWGN channel. BER performance of the proposed technique is also presented.

Doppler-shift estimation of flat underwater channel using data-aided least-square approach

  • Pan, Weiqiang;Liu, Ping;Chen, Fangjiong;Ji, Fei;Feng, Jing
    • International Journal of Naval Architecture and Ocean Engineering
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    • v.7 no.2
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    • pp.426-434
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    • 2015
  • In this paper we proposed a dada-aided Doppler estimation method for underwater acoustic communication. The training sequence is non-dedicate, hence it can be designed for Doppler estimation as well as channel equalization. We assume the channel has been equalized and consider only flat-fading channel. First, based on the training symbols the theoretical received sequence is composed. Next the least square principle is applied to build the objective function, which minimizes the error between the composed and the actual received signal. Then an iterative approach is applied to solve the least square problem. The proposed approach involves an outer loop and inner loop, which resolve the channel gain and Doppler coefficient, respectively. The theoretical performance bound, i.e. the Cramer-Rao Lower Bound (CRLB) of estimation is also derived. Computer simulations results show that the proposed algorithm achieves the CRLB in medium to high SNR cases.

ON THE SIZE OF THE SET WHERE A MEROMORPHIC FUNCTION IS LARGE

  • Kwon, Ki-Ho
    • Korean Journal of Mathematics
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    • v.18 no.4
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    • pp.465-472
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    • 2010
  • In this paper, we investigate the extent of the set on which the modulus of a meromorphic function is lower bounded by a term related to some Nevanlinna Theory functionals. A. I. Shcherba estimate the size of the set on which the modulus of an entire function is lower bounded by 1. Our theorem in this paper shows that the same result holds in the case that the lower bound is replaced by$lT(r,f)$, $0{\leq}l$ < 1, which improves Shcherba's result. We also give a similar estimation for meromorphic functions.

A Bhattacharyya Analogue for Median-unbiased Estimation

  • Sung, Nae-Kyung
    • Communications for Statistical Applications and Methods
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    • v.11 no.1
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    • pp.13-20
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    • 2004
  • A more general version of diffusivity based on total variation of density is defined and an information inequality for median-unbiased estimation is presented. The resulting information inequality can be interpreted as an analogue of the Bhattacharyya system of lower bounds for mean-unbiased estimation. A condition on which the information bound is achieved is also given.

A Lower Bound Estimation on the Number of Micro-Registers in Time-Multiplexed FPGA Synthesis (시분할 FPGA 합성에서 마이크로 레지스터 개수에 대한 하한 추정 기법)

  • 엄성용
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.9
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    • pp.512-522
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    • 2003
  • For a time-multiplexed FPGA, a circuit is partitioned into several subcircuits, so that they temporally share the same physical FPGA device by hardware reconfiguration. In these architectures, all the hardware reconfiguration information called contexts are generated and downloaded into the chip, and then the pre-scheduled context switches occur properly and timely. Typically, the size of the chip required to implement the circuit depends on both the maximum number of the LUT blocks required to implement the function of each subcircuit and the maximum number of micro-registers to store results over context switches in the same time. Therefore, many partitioning or synthesis methods try to minimize these two factors. In this paper, we present a new estimation technique to find the lower bound on the number of micro-registers which can be obtained by any synthesis methods, respectively, without performing any actual synthesis and/or design space exploration. The lower bound estimation is very important in sense that it greatly helps to evaluate the results of the previous work and even the future work. If the estimated lower bound exactly matches the actual number in the actual design result, we can say that the result is guaranteed to be optimal. In contrast, if they do not match, the following two cases are expected: we might estimate a better (more exact) lower bound or we find a new synthesis result better than those of the previous work. Our experimental results show that there are some differences between the numbers of micro-registers and our estimated lower bounds. One reason for these differences seems that our estimation tries to estimate the result with the minimum micro-registers among all the possible candidates, regardless of usage of other resources such as LUTs, while the previous work takes into account both LUTs and micro-registers. In addition, it implies that our method may have some limitation on exact estimation due to the complexity of the problem itself in sense that it is much more complicated than LUT estimation and thus needs more improvement, and/or there may exist some other synthesis results better than those of the previous work.

Lifetime Estimation for Mixed Replacement Grouped Data in Competing Failures Model

  • Lee, Tai-Sup;Yun, Sang-Un
    • International Journal of Reliability and Applications
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    • v.2 no.3
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    • pp.189-197
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    • 2001
  • The estimation of mean lifetimes in presence of interval censoring with mixed replacement procedure is examined when the distributions of lifetimes are exponential. It is assumed that, due to physical restrictions and/or economic constraints, the number of failures is investigated only at several inspection times during the lifetime test; thus there is interval censoring. The maximum likelihood estimator is found in an implicit form. The Cramor-Rao lower bound, which is the asymptotic variance of the estimator, is derived. The estimation of mean lifetimes for competing failures model has been expanded.

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