• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.339-344
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• 2014

This paper presents a novel bipolar junction transistor (BJT) based electrostatic discharge (ESD) protection device. This protection device was designed for 20V power clamps and fabricated by a process with Bipolar-CMOS-DMOS (BCD) $0.18{\mu}m$. The current-voltage characteristics of this protection device was verified by the transmission line pulse (TLP) system and the DC BV characteristic was verified by using a semiconductor parameter analyzer. From the experimental results, the proposed device has a trigger voltage of 29.1V, holding voltage of 22.4V and low on-resistance of approximately $1.6{\Omega}$. In addition, the test of ESD robustness showed that the ESD successfully passed through human body model (HBM) 8kV. In this paper, the operational mechanism of this protection device was investigated by structural analysis of the proposed device. In addition, the proposed device were obtained as stack structures and verified.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.1937-1939
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• 1998

This paper presents a simple switching method to generate a PWM pattern mostly relevant to signle-phase three-level PWM rectifier. The adopted PWM switching pattern is performed in a manner similar to the space vector PWM method, which is popularly used in the three-phase rectifier and inverter. A set of possible voltages has been selected so that an equation with a time integral considered within a sampling period should be satisfied every sampling time. The simulation result shows that the proposed control scheme is good in some performance criteria such as unity power factor, low harmonic distortion of input current, dynamic response and voltage balancing of two series-connected DC capacitors.

• The Korean Journal of Physiology and Pharmacology
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• v.1 no.3
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• pp.233-240
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• 1997

Neurons in the nucleus raphe magnus are involved in descending modulation of nociceptive transmission. In this study, we attempted to investigate electrophysiological properties of the NRM neurons dissociated from the postnatal rat medulla. The NRM neurons in the coronal slices of and the dissociated neurons from the postnatal rat medullae were immunohistochemically identified using antibody against serotonin. Relatively small number of neurons were positively stained in both preparations. The positively stained neurons displayed large cell body with double or multiple neurites. Using whole-cell patch clamp configuration ionic currents were recorded from the dissociated NRM-like neurons selected by criteria such as size and shape of cell body and cell population. Two types, high- and low-threshold, of voltage-dependent calcium currents were recorded from the dissociated NRM-like neurons. Some neurons displayed both types of calcium currents, whereas others displayed only high-threshold calcium current. Voltage-dependent potassium currents were also recorded from the dissociated NRM neurons. Some neurons displayed both transient outward and delayed rectifier currents but others showed only delayed rectifier current. These results suggest that there are at least two types of calcium currents and two types of potassium currents in the dissociated NRM neurons.

• ETRI Journal
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• v.37 no.1
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• pp.97-106
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• 2015

In this paper, MOS-triggered silicon-controlled rectifier (SCR)-based electrostatic discharge (ESD) protection circuits for mobile application in 3.3 V I/O and SCR-based ESD protection circuits with floating N+/P+ diffusion regions for inverter and light-emitting diode driver applications in 20 V power clamps were designed. The breakdown voltage is induced by a grounded-gate NMOS (ggNMOS) in the MOS-triggered SCR-based ESD protection circuit for 3.3 V I/O. This lowers the breakdown voltage of the SCR by providing a trigger current to the P-well of the SCR. However, the operation resistance is increased compared to SCR, because additional diffusion regions increase the overall resistance of the protection circuit. To overcome this problem, the number of ggNMOS fingers was increased. The ESD protection circuit for the power clamp application at 20 V had a breakdown voltage of 23 V; the product of a high holding voltage by the N+/P+ floating diffusion region. The trigger voltage was improved by the partial insertion of a P-body to narrow the gap between the trigger and holding voltages. The ESD protection circuits for low- and high-voltage applications were designed using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology, with $100{\mu}m$ width. Electrical characteristics and robustness are analyzed by a transmission line pulse measurement and an ESD pulse generator (ESS-6008).

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.2
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• pp.112-119
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• 2021

This study proposes a design method of high-power-density and high-efficiency low-voltage DC-DC converters using SiC MOSFET and the optimized planar transformer design procedure based on the figure-of-merit. The secondary rectifying circuit of the phase-shifted full-bridge converter is compared to achieve high power density and high efficiency, and the phase-shifted full bridge converter with a current-doubler rectifier is selected. The planar transformer is designed by the proposed optimized design procedure and verified by FEA simulation. To validate the proposed design method, experimental results from a 3 kW prototype are provided. The prototype achieved 95.28% maximum efficiency and a power density of 2.98 kW/L.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1270-1273
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• 2000

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter is proposed. The new converter improves the drawbacks of the previously proposed ZVZCS FB PWM converters [1-5]. A simple auxiliary circuit with neither lossy components nor active switches achieves ZVZCS of the primary switches. Since the proposed converter has many advantages such as simple auxiliary circuit, high efficiency, and low voltage stress of the rectifier diode, it is very attractive for the high power applications. The principles of operation and design considerations are presented. The experimental verifications from 2.5kW prototype converter operating at 70kHz are presented.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.9
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• pp.590-597
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• 2000

Design of single state AC-DC converter with high power factor for low level applications is proposed. The proposed converter is obtained from the integration of a buck-boost converter and the half-bridge DC-DC converter. This converter gives the good power factor correction low line current harmonic distortions and tight output voltage regulations. This converter also has a high efficiency by employing an soft switching method and synchronous rectifier. The modelling and detailed analysis for the proposed converter are performed. To verify the performance of the proposed converter a 100W converter has been designed

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.1166-1168
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• 2003

In most power electronic applications, the AC power input provided by the electronic utility needs to first converted to a DC voltage. Such conversion is accomplished by a diode rectifier due to its circuit simplicity and low cost. However, since diode rectifiers have some intrinsic problems such as low power factor and high harmonic distortion, a wide use of such rectifiers may cause noises, malfunction and heat damage in both electrical power systems and electrical machinery systems. This paper proposes soft switched three-phase single switch boost-type converter. The proposed circuit can perform Zero Voltage Switched(ZVS) without using any current and voltage sensors. For this circuit, both simulation and experiments have been performed. The results not only confirmed the ZVS but also indicated that, compared to the conventional hard switched converter, the prosed circuit can improve the efficiency as much as 1.7 to 4.7[%] while keeping the same high power factor and small harmonic distortion in their AC input.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.352-355
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• 2006

A new PWM-controlled quasi-resonant converter for high efficiency PDP sustaining power module is proposed in this paper. The load regulation of the proposed converter can be achieved by controlling the ripple of the resonant voltage across the resonant capacitor with hi-directional auxiliary circuit, while the main switches are operating at the fixed duty ratio and fixed switching frequency. Hence, the waveform of currents can be expected to be optimized on the conduction loss. Furthermore, the proposed converter shows the good ZVS capability, simple control circuits, no high voltage ringing problem of rectifier diodes, no DC offset of the magnetizing current and low voltage stress of power switches. In this paper, operational principles, analysis and design considerations are presented. Experimental results demonstrate that the output voltage can be controlled well by the auxiliary circuit as PWM method.

• Journal of Power Electronics
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• v.7 no.1
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• pp.28-37
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• 2007

A new PWM-controlled quasi-resonant converter for a high efficiency PDP sustaining power module is proposed in this paper. The load regulation of the proposed converter can be achieved by controlling the ripple of the resonant voltage across the resonant capacitor with a bi-directional auxiliary circuit, while the main switches are operating at a fixed duty ratio and fixed switching frequency. Hence, the waveforms of the currents can be expected to be optimized from the view-point of conduction loss. Furthermore, the proposed converter has good ZVS capability, simple control circuits, no high voltage ringing problem of rectifier diodes, no DC offset of the magnetizing current and low voltage stresses of power switches. In this paper, operational principles, features of the proposed converter, and analysis and design considerations are presented. Experimental results demonstrate that the output voltage can be controlled well by the auxiliary circuit using the PWM method.