• Journal of Power Electronics
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• 제15권3호
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• pp.644-651
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• 2015

This paper introduces a novel digital one cycle control (DOCC) boost power factor correction (PFC) converter. The proposed PFC converter realizes the FPGA-based DOCC control approach for single-phase PFC rectifiers without input voltage sensing or a complicated two-loop compensation design. It can also achieve a high power factor and the operation of low harmonic input current ingredients over universal loads in continuous conduction mode. The trailing triangle modulation adopted in this approach makes the acquisition of the average input current an easy process. The controller implementation is based on a boost topology power circuit with low speed, low-resolution A/D converters, and economical FPGA development board. Experimental results demonstrate that the proposed PFC rectifier can obtain a PF value of up to 0.999 and a minimum THD of at least 1.9% using a 120W prototype.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.323-326
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• 1999

For decrease the harmonic current components of the power source, a first method is insert the choke coil that used the choke input type rectifier, the booster chopper circuit and buck chopper circuit. And the several method are studying like as the PWM(Pulse Width Modulation) converter and the active filter type which is used the high frequency switching and the sinusoidal wave formed input current. In this type, there are many problem as a low efficiency, increased the noise, the high leakage current and cost up by the high frequency switching. For improve this problems, the partial resonan method is used on the booster inducter and lossles snubber condenser. This method decreased the distortion factor has lower harmonic components than the hard switching and there is no switching loss by the ZCS(Zero Current Switching) at switch turn-on and the ZVS(Zero Voltage Swithcing) at switch turn-off

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 추계학술대회 논문집
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• pp.13-14
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• 2016

This paper has introduces a novel Integrated On-board Charger (IOBC) to reduce the size, weight and cost of power conversion stages in Electric Vehicles (EVs). The IOBC is composed of an OBC and a low voltage dc-dc converter (LDC). The IOBC includes a bidirectional ac-dc converter and a bidirectional full-bridge converter with an active clamp circuit. The LDC converter is a hybrid topology combining an active clamped full-bridge converter and a forward converter derived from the Weinburg converter topology. Unlike conventional OBC, the proposed IOBC is compact and the LDC converter of it can achieve a higher efficiency. In addition, the LDC converter of the proposed IOBC can achieve high step-down voltage conversion ratio, no circulating current, no reverse recovery current of the rectifier diodes and small ripple current of output inductor on the auxiliary battery. A 1kW hardware of the LDC converter is implemented to verify the performances of the proposed IOBC.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.176-179
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• 2005

This paper proposed the two-transistor forward circuit using PFC, lossless snubber and synchronous rectifier for low voltage and high current output. The principle of operation, feature and design considerations is illustrated and verified through the experiment with a 200W(5V, 40A) 100kHz MOSFET based experimental circuit.

• Journal of Power Electronics
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• 제3권4호
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• pp.249-258
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• 2003

This paper presents a high-efficient and cost effective three-phase AC/DC-DC/AC power conversion system with a single two-switch type active Auxiliary Resonant DC Link (ARDCL) snubber circuit, which can minimize the total power dissipation. The active ARDCL snubber circuit is proposed in this paper and its unique features are described. Its operation principle in steady-state is discussed for the three phase AC/DC-DC/AC converter, which is composed of PWM rectifier as power factor correction (PFC) converter, sinewave PWM inverter. In the presented power converter system not only three-phase AC/DC PWM rectifier but also three-phase DC/AC inverter can achieve the stable ZVS commutation for all the power semiconductor devices. It is proved that the proposed three-phase AC/DC-DC/AC converter system is more effective and acceptable than the previous from the cost viewpoint and high efficient consideration. In addition, the proposed two-switch type active auxiliary ARDCL snubber circuit can reduce the peak value of the resonant inductor injection current in order to maximize total system actual efficiency by using the improved DSP based control scheme. Moreover the proposed active auxiliary two-switch ARDCL snubber circuit has the merit so that there is no need to use any sensing devices to detect the voltage and current in the ARDCL sunbber circuit for realizing soft-switching operation. This three-phase AC/DC-DC/AC converter system developed for UPS can achieve the 1.8% higher efficiency and 20dB lower conduction noise than those of the conventional three-phase hard-switching PWM AC/DC-DC/AC converter system. It is proved that actual efficiency of the proposed three-phase AC/DC-DC/AC converter system operating under a condition of soft switching is 88.7% under 10kw output power.

• Journal of Power Electronics
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• 제18권4호
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• pp.965-974
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• 2018

A new zero-voltage-switching (ZVS) push-pull pulse-width modulation (PWM) converter is proposed in this paper. The wide ZVS condition for all of the switches is obtained by utilizing the energy stored in the output inductor and magnetizing inductance. As a result, the switching losses can be dramatically reduced. A simple auxiliary circuit including two small diodes and one capacitor is added at the secondary side of a high frequency (HF) transformer to reset the primary current during the circulating stage and to clamp the voltage spike across the rectifier diodes, which enables the use of low-voltage and low-cost diodes to reduce the conducting and reverse recovery losses. In addition, there are no active devices or resistors in the auxiliary circuit, which can be realized easily. A detailed steady operation analysis, characteristics, design considerations, experimental results and a loss breakdown are presented for the proposed converter. A 500 W prototype has been constructed to verify the effectiveness of the proposed concept.

• 전력전자학회논문지
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• 제22권4호
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• pp.297-304
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• 2017

The purpose of this paper is to analyze losses because of switching devices and the secondary side circuit diodes of 500 W full bridge dc-dc converter by applying gallium nitride (GaN) field-effect transistor (FET), which is one of the wide band gap devices. For the detailed device analysis, we translate the specific resistance relation caused by the GaN FET material property into algebraic expression, and investigate the influence of the GaN FET structure and characteristic on efficiency and system specifications. In addition, we mathematically compare the diode rectifier circuit loss, which is a full bridge dc-dc converter secondary side circuit, with the synchronous rectifier circuit loss using silicon metal-oxide semiconductor (Si MOSFET) or GaN FET, which produce the full bridge dc-dc converter analytical value validity to derive the final efficiency and loss. We also design the heat sink based on the mathematically derived loss value, and suggest the heat sink size by purpose and the heat divergence degree through simulation.

• 한국위성정보통신학회논문지
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• 제8권4호
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• pp.124-129
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• 2013

PPS 구조가 삽입된 N형 실리콘 제어 정류기 소자를 마이크로 칩의 고전압 I/O 응용을 위해 연구하였다. 종래의 NSCR_PPS_Std 표준소자는 매우 낮은 스냅백 홀딩 전압을 갖는 전형적인 SCR 특성을 가지고 있어 정상적인 동작 동안 래치업 문제가 나타나는 것으로 보고되고 있다. 그러나 본 연구에서 제안하는 CPS 및 부분적으로 형성된 P-Well(PPW) 구조를 갖는 변형된 NSCR_PPS_CPS_PPW 소자는 높은 래치업 면역과 트리거링 전압의 조절이 용이한 안정한 ESD 보호 성능을 나타내어 고전압 동작용 마이크로 칩의 정전기보호 소자로 적용 가능함을 확인하였다.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2005년도 춘계종합학술대회
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• pp.273-276
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• 2005

This paper presents an electronic ballast using a step down converter, a low frequency inverter for high pressure discharge lamp. The proposed ballast is composed of a full-wave rectifier, a step down converter operated as a current source with power regulation and a low frequency inverter with ignition circuit. The ignition circuit generates high voltage pulse of 1${\sim}$2[kV] peak, 130[Hz]. Moreover, it is able to reignite at regular intervals by protective circuit. As experimental results on the test, lamp voltage, current and consumption power are measured 132.5[V], 7.6[A] and 1,005[W], respectively. It was confirmed that the designed ballast operate the lamp with a constant power.

• Journal of Power Electronics
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• 제9권5호
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• pp.726-735
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• 2009

This paper presents a Bidirectional High-Frequency Link (BHFL) inverter that utilizes the Deadbeat controller. The main features of this topology are the reduced size of the inverter and fewer power switches. On the secondary side of the transformer, the active rectifier employs only two power switches, thus reducing switching losses. Using this configuration, the inverter is capable of carrying a bidirectional power flow. The inverter is controlled by a Deadbeat controller, which consists of the inner current loop, outer voltage loop and a feedforward controller. Additional disturbance decoupling networks are employed to improve the system's robustness towards load variations. A 1-kVA prototype inverter has been constructed and the Deadbeat control algorithm is experimentally verified. The experimental results show that the inverter has high efficiency (91%) with low steady state output voltage total harmonics distortion (1.5%).