• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.629-632
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• 1998

This paper presents a new and simple technique to realize high Q inductor on low resistivity silicon wafer with 6 $\Omega$.cm. This technique is very compatible with bipolar and CMOS standard silicon process. By forming the deep and narrow trenches on the low resistivity wafer substrate under inductor pattern, oxidizing and filling with undoped polysilicon, the low resistivity silicon wafer acts as high resistivity wafer being suitable for the fabrication of high Q inductor. By using this technique the quality factor (Q) for 8-turn spiral inductor was improved up to max. 10.3 at 2 ㎓ with 3.0 $\mu\textrm{m}$ of metal thickness. The experiment results show that Q on low resistivity silicon wafer with the trench technique have been improved more than 2 times compared to the conventional low resistivity silicon wafer without trenches.

• KIEE International Transactions on Electrophysics and Applications
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• 제5C권2호
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• pp.76-80
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• 2005

In this paper, a miniaturized ring hybrid circuit is characterized based on a thin film microstrip (TFMS) on low-resistivity silicon. In order to obtain low-loss characteristics, a polyimide layer with 50 $\mu$m thickness is spin-coated onto the silicon to be used for the substrate. First, propagation characteristics of TFMS lines consisting of the ring hybrid circuit are presented. Then, a ring hybrid circuit based on TFMS is featured by employing the triple concentric circle approach for miniaturization. Triple concentric circle lines with $\lambda$$_{g}$/4 or 3$\lambda$$_{g}$/4 line lengths are implemented on the surface of the polyimide by circularly meandering to reduce the circuit size of the designed ring hybrid. Good agreement between measured and simulated results is obtained.

• 한국표면공학회지
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• 제51권3호
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• pp.185-190
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• 2018

Dopant-free silicon heterojunction solar cells using Transition Metal Oxide(TMO) such as Molybdenum Oxide($MoO_X$) and Vanadium Oxide($V_2O_X$) have been focused on to increase the work function of TMO in order to maximize the work function difference between TMO and n-Si for a high-efficiency solar cell. One another way to increase the work function difference is to control the silicon wafer resistivity. In this paper, dopant-free silicon heterojunction solar cells were fabricated using the wafer with the various resistivity and analyzed to understand the effect of n-Si work function. As a result, it is shown that the high passivation and junction quality when $V_2O_X$ deposited on the wafer with low work function compared to the high work function wafer, inducing the increase of higher collection probability, especially at long wavelength region. the solar cell efficiency of 15.28% was measured in low work function wafer, which is 34% higher value than the high work function solar cells.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제51권6호
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• pp.271-277
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• 2002

In this paper, a MEMS silicon package is newly designed, fabricated for HMIC, and characterized for microwave and millimeter-wave device applications. The proposed package is fabricated by using two high resistivity silicon substrates and surface/bulk micromachining technology. It has a good performance characteristic such as -20㏈ of $S_11$/ and -0.3㏈ of $S_21$ up to 20㎓, which is useful in microwave region. It has also better heat transfer characteristics than the commonly used ceramic package. Since the proposed silicon MEMS package is easy to fabricate and wafer level chip scale packaging is also possible, the production cost can be much lower than the ceramic package. Since it will be a promising low-cost package for mobile/wireless applications.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.272-272
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• 2009

Screen-printing metal contact is typically applied to the solar cells for mass production. And metal paste is used widely for rear contact formation of silicon solar cells. However, Screen-printing solar cell metal paste contact has low aspect ratio, low accuracy, high resistivity, hard control of unclean process. In this paper is to develop resistivity of rear contact for silicon solar cells applications. 4-point prove result, This resistivity of rear contact by Al evaporation was measured about $3.56{\times}10^6{\Omega}{\cdot}cm$ less than screen printed solar cell about $52.6{\times}10^6{\Omega}{\cdot}cm$.

• Journal of electromagnetic engineering and science
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• 제2권2호
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• pp.59-64
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• 2002

In this paper, 10$\mu$ m-elevated MEMS CPWs on various substrates are presented. Effective dielectric constants of elevated CPW(ECPW) on polyimide-loaded silicon or alumina substrate are examined and characteristic impedances are also computed versus elevation height. Dispersive property of ECPW and its electromagnetic field distributions are studied through 3-D FDTD algorithm for optimum design. Attenuation of ECPW is measured with TRL calibration procedure and revealed about 3.2 43 lower than that of conventional CPW on the same low-resistivity silicon at 40 CHz. ECPW on polyimide-loaded silicon with overlapped configuration reveals 0.2 dB/mm. Especially, alumina substrate imposes better attenuation than silicon.

• 한국광학회:학술대회논문집
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• 한국광학회 2003년도 제14회 정기총회 및 03년 동계학술발표회
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• pp.300-301
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• 2003

As the demand for high frequency(bandwidth) optical module is increased, there is a need for fabricating silicon optical bench(SiOB) with low parasitic impedance. In this paper, we discuss multi-layer structure method for manufacturing SiOB with low capacitance. This structure method decreases the capacitance between the conductive patterns for about 94∼97％ compared to the conventional structure without raising the resistivity of silicon, or increasing the thickness of the dielectric film.

• 한국재료학회지
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• 제1권1호
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• pp.23-28
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• 1991

저압 화학 증착법으로 증착된 다결정실리콘에 As를 이온주입하여 As농도와 $25~105^{\circ}C$ 범위의 측정온도에 따른 비저항의 변화를 조사하였다. 비저항이 최대가 되는 적정 As농도가 존재하였으며 이때 비저항의 온도의존성면에서 활성화에너지 값도 최대를 보였다. Passivation공정후 감소된 비저항이 $O_2$플라즈마 처리와 $N_2$ 분위기에서의 열처리에 의하여 회복되는 현상에 대하여 설명한다.

• 전기의세계
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• 제22권5호
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• pp.5-11
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• 1973

A new method of forming silicon p$^{+}$-n-n$^{+}$ junctions has been attempted by using the VDH-Implanter (Vacuum Discharge and Heating). Each of p$^{+}$-n and n-n$^{+}$ junctions was formed on both sides of an n-type silicon substrate by means of predeposition of each dopant and their bombarding due to rarefied air ions together with the preheating of the substrate in the implanter. The recifying principle of the p$^{+}$-n-n$^{+}$ junctions is thought to be based on the theory of double injection. The I-V characteristic of the diode has shown that it has a fairly high forward current density with the desirable rise due to vary low voltage though the reverse voltage is a little low on account of the low resistivity of the silicon substrate.n substrate.

• Composites Research
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• 제25권6호
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• pp.172-177
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• 2012

저저항 Si-SiC 소결체 제조를 위해 ${\alpha}$-SiC에서 조성과 C의 양을 변화시키면서 반응소결 특성을 고찰하였다. 시료준비는 정수압으로 성형체를 제조하였고, 용융Si 반응소결을 통해 시험편을 준비하였다. 반응소결체의 미세구조, 기계적 특성 및 전기저항 분석 결과 용융Si과 반응 후 미립의 ${\beta}$-SiC가 생성되었고, 치밀한 소결체를 형성하였다. 미립 ${\beta}$-SiC 생성량은 카본 양 에 따라 증가하였다. 그리고 C함량 10wt%이내에서 기계 R전기저항특성은 입도조성 영향이 크고 카본 함량 10wt%이상에서는 상전이 반응의 영향이 큼을 알 수 있었다.