• 제목/요약/키워드: Low-k wafer

검색결과 306건 처리시간 0.031초

Love파를 이용한 저점성 유체 점도 측정용 표면 탄성파 센서 개발 (Development of Surface Acoustic Wave Sensor for Viscosity Measurement of Low Viscose Liquid Using Love Wave)

  • 이상대;김기복;이대수
    • Journal of Biosystems Engineering
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    • 제33권4호
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    • pp.282-287
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    • 2008
  • Love wave is one of the shear horizontal waves and it can propagate between two layers in liquid without energy loss. The SAW (surface acoustic wave) sensor using Love wave is very useful for real time measurement of the viscosity of liquid with high sensitivity. In this study, the 77 MHz and 155 MHz Love wave SAW sensors were fabricated and use to measure the viscosity of low viscous liquid. To generate the surface acoustic wave, the inter-digital transducers were fabricated on the quartz crystal wafer. In order to obtain the optimal thickness of the coating film (novolac photoresist) generating the Love wave on the surface of SAW device, theoretical calculation was performed. The performances of fabricated Love wave SAW sensors were tested. As test liquid, pure water and glycerol solutions having different concentrations were used. Since the determination coefficients of the regression equations for measuring the viscosity of liquid are greater than 0.98, the developed Love wave SAW sensors in this study will be very useful for precise measurement of viscosity of liquid.

플라즈마 제트 도핑 장치의 대기 및 기체의 압력 변화에 대한 방전 특성 (Discharge Characteristics of Plasma Jet Doping Device with the Atmospheric and Ambient Gas Pressure)

  • 김중길;이원영;김윤중;한국희;김동준;김현철;구제환;권기청;조광섭
    • 한국진공학회지
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    • 제21권6호
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    • pp.301-311
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    • 2012
  • 결정질 태양전지 등의 도핑 공정에 적용하기 위한 플라즈마 제트 장치의 기초 방전 특성을 조사한다. 대기압에서의 아르곤 플라즈마 제트와 대기 압력변화에 대한 대기 플라즈마 제트, 그리고 아르곤 분위기 압력 변화에 대한 플라즈마 제트의 전류-전압은 전형적인 정상 글로우 방전의 특성을 갖는다. 대기압 플라즈마 제트의 방전 전압은 약 2.5 kV의 높은 전압이 요구되며, 대기 및 아르곤 플라즈마 제트는 200 Torr 이하의 낮은 압력에 대한 방전 전압은 약 1 kV가 된다. 도핑용 실리콘 웨이퍼에 조사되는 단일 채널 플라즈마 제트의 전류는 인가전압의 조정에 의하여 수 10~50 mA의 고 전류를 용이하게 얻는다. 플라즈마 제트를 웨이퍼에 조사하는 경우에 웨이퍼의 온도 상승은 정상상태에서 약 $200^{\circ}C$가 된다. 실리콘 웨이퍼에 도핑 용재인 액상의 인산을 도포하여 플라즈마를 조사한 결과 얻어진 인 원자의 도핑 분포는 플라즈마 제트 도핑의 가능성을 보여준다.

새로운 대기압 플라즈마 소스를 이용한 결정질 실리콘 태양전지 인(P) 페이스트 도핑에 관한 연구 (A Study on Feasibility of the Phosphoric Paste Doping for Solar Cell using Newly Atmospheric Pressure Plasma Source)

  • 조이현;윤명수;조태훈;노준형;전부일;김인태;최은하;조광섭;권기청
    • 신재생에너지
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    • 제9권2호
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    • pp.23-29
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    • 2013
  • Furnace and laser is currently the most important doping process. However furnace is typically difficult appling for selective emitters. Laser requires an expensive equipment and induces a structural damage due to high temperature using laser. This study has developed a new atmospheric pressure plasma source and research atmospheric pressure plasma doping. Atmospheric pressure plasma source injected Ar gas is applied a low frequency (a few 10 kHz) and discharged the plasma. We used P type silicon wafers of solar cell. We set the doping parameter that plasma treatment time was 6s and 30s, and the current of making the plasma is 70 mA and 120 mA. As result of experiment, prolonged plasma process time and highly plasma current occur deeper doping depth and improve sheet resistance. We investigated doping profile of phosphorus paste by SIMS (Secondary Ion Mass Spectroscopy) and obtained the sheet resistance using generally formula. Additionally, grasped the wafer surface image with SEM (Scanning Electron Microscopy) to investigate surface damage of doped wafer. Therefore we confirm the possibility making the selective emitter of solar cell applied atmospheric pressure plasma doping with phosphorus paste.

저가 다결정 EFG 리본 웨이퍼의 표면 반사도 특성 최적화 (Optimizing Surface Reflectance Properties of Low Cost Multicrystalline EFG Ribbon-silicon)

  • 김병국;이용구;저호;오병진;박재환;이진석;장보윤;안영수;임동건
    • 한국전기전자재료학회논문지
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    • 제24권2호
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    • pp.121-125
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    • 2011
  • Ribbon silicon solar cells have been investigated because they can be produced with a lower material cost. However, it is very difficult to get good texturing with a conventional acid solution. To achieve high efficiency should be minimized for the reflectance properties. In this paper, acid vapor texturing and anti-reflection coating of $SiN_x$ was applied for EFG Ribbon Si Wafer. P-type ribbon silicon wafer had a thickness of 200 ${\mu}m$ and a resistivity of 3 $\Omega-cm$. Ribbon silicon wafers were exposed in an acid vapor. Acid vapor texturing was made by reaction between the silicon and the mixed solution of HF : $HNO_3$. After acid vapor texturing process, nanostructure of less than size of 1 ${\mu}m$ was formed and surface reflectance of 6.44% was achieved. Reflectance was decreased to 2.37% with anti-reflection coating of $SiN_x$.

결정질 실리콘 태양전지에 적용될 Light-induced plating을 이용한 Ni/Cu 전극에 관한 연구 (The Research of Ni/Cu Contact Using Light-induced Plating for Cryatalline Silicom Solar Cells)

  • 김민정;이수홍
    • 한국태양에너지학회:학술대회논문집
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    • 한국태양에너지학회 2009년도 추계학술발표대회 논문집
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    • pp.350-355
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    • 2009
  • The crysralline silicon solar cell where the solar cell market grows rapidly is occupying of about 85% or more high efficiency and low cost endeavors many crystalline solar cells. The fabricaion process of high efficiency crystalline silicon solar cells necessitate complicated fabrication processes and Ti/Pd/AG contact, This metal contacts have only been used in limited areas in spite of their good srability and low contact resistance because of expensive materials and process. Commercial solar cells with screen-printed solar cells formed by using Ag paste suffer from loe fill factor and high contact resistance and low aspect ratio. Ni and Cu metal contacts have been formed by using electroless plating and light-induced electro plating techniques to replace the Ti/Pd/Ag and screen-printed Ag contacts. Copper and Silver can be plated by electro & light-induced plating method. Light-induced plating makes use the photovoltaic effect of solar cell to deposit the metal on the front contact. The cell is immersed into the electrolytic plating bath and irradiated at the front side by light source, which leads to a current density in the front side grid. Electroless plated Ni/ Electro&light-induced plated Cu/ Light-induced plated Ag contact solar cells result in an energy conversion efficiency of 16.446 % on 0.2~0.6${\Omega}$ cm, $20{\times}20mm^2$, CZ(Czochralski) wafer.

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파우더와 솔더를 이용한 저비용 비아홀 채움 공정 (Low Cost Via-Hole Filling Process Using Powder and Solder)

  • 홍표환;공대영;남재우;이종현;조찬섭;김봉환
    • 센서학회지
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    • 제22권2호
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    • pp.130-135
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    • 2013
  • This study proposed a noble process to fabricate TSV (Through Silicon Via) structure which has lower cost, shorter production time, and more simple fabrication process than plating method. In order to produce the via holes, the Si wafer was etched by a DRIE (Deep Reactive Ion Etching) process. The via hole was $100{\mu}m$ in diameter and $400{\mu}m$ in depth. A dielectric layer of $SiO_2$ was formed by thermal oxidation on the front side wafer and via hole side wall. An adhesion layer of Ti and a seed layer of Au were deposited. Soldering process was applied to fill the via holes with solder paste and metal powder. When the solder paste was used as via hole metal line, sintering state and electrical properties were excellent. However, electrical connection was poor due to occurrence of many voids. In the case of metal powder, voids were reduced but sintering state and electrical properties were bad. We tried the via hole filling process by using mixing solder paste and metal powder. As a consequence, it was confirmed that mixing rate of solder paste (4) : metal powder (3) was excellent electrical characteristics.

반도체 공정 온도제어용 칠러의 실험적 연구 (Experimental Study of Process Chiller for Semiconductor Temperature Control)

  • 차동안;권오경;오명도
    • 대한기계학회논문집B
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    • 제35권5호
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    • pp.459-465
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    • 2011
  • 반도체 제조를 위한 공정에서는 과도한 열이 발생한다. 따라서 Chamber 내의 웨이퍼나 주변온도를 일정하게 유지할 수 있도록 온도의 정밀제어가 요구된다. 반도체 칠러는 산업용 칠러와는 다르게 운전조건이 24시간 년중 지속되므로 반도체 칠러는 전력소비량이 대단히 크며, 냉동기의 최적 운전제어를 통한 저소비전력 칠러 개발이 대단히 필요하다. 국내에서 판매되고 있는 반도체 칠러는 수입품에 비해 전력소비가 높아 제품 경쟁력이 낮은 실정이다. 이에 따라 본 연구에서는 국내에서 개발된 반도체 칠러에 관한 실험적 연구를 통하여 칠러의 부하변화 실험, 온도 상승 하강실험, 제어정밀도 실험 등을 통하여 칠러의 에너지절감 방향을 제시하고자 한다. 실험을 통하여 칠러의 냉각능력은 2.1~3.9 kW, EER은 0.56~0.93으로 측정되었다. 제어정밀도는 $0^{\circ}C$에서 ${\pm}1^{\circ}C$, $30^{\circ}C$ 이상 설정에서는 ${\pm}0.6^{\circ}C$로 향상되는 것으로 나타났다.

Effect of Hydroxyl Ethyl Cellulose Concentration in Colloidal Silica Slurry on Surface Roughness for Poly-Si Chemical Mechanical Polishing

  • Hwang, Hee-Sub;Cui, Hao;Park, Jin-Hyung;Paik, Ungyu;Park, Jea-Gun
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.545-545
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    • 2008
  • Poly-Si is an essential material for floating gate in NAND Flash memory. To fabricate this material within region of floating gate, chemical mechanical polishing (CMP) is commonly used process for manufacturing NAND flash memory. We use colloidal silica abrasive with alkaline agent, polymeric additive and organic surfactant to obtain high Poly-Si to SiO2 film selectivity and reduce surface defect in Poly-Si CMP. We already studied about the effects of alkaline agent and polymeric additive. But the effect of organic surfactant in Poly-Si CMP is not clearly defined. So we will examine the function of organic surfactant in Poly-Si CMP with concentration separation test. We expect that surface roughness will be improved with the addition of organic surfactant as the case of wafering CMP. Poly-Si wafer are deposited by low pressure chemical vapor deposition (LPCVD) and oxide film are prepared by the method of plasma-enhanced tetra ethyl ortho silicate (PETEOS). The polishing test will be performed by a Strasbaugh 6EC polisher with an IC1000/Suba IV stacked pad and the pad will be conditioned by ex situ diamond disk. And the thickness difference of wafer between before and after polishing test will be measured by Ellipsometer and Nanospec. The roughness of Poly-Si film will be analyzed by atomic force microscope.

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태양전지용 경면 제조 공정에 대한 연구 (A Study on Mirror Surface Manufacturing Process for Solar Cell)

  • 이종권;박지환;송태환;류근걸;이윤배
    • 한국산학기술학회논문지
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    • 제4권1호
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    • pp.47-49
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    • 2003
  • 태양전지에 소모되는 비용중의 30% 이상이 silicon 기판의 가공 및 silicon자체의 비용이다. 본 연구에서는 이러한 비운을 절감하기 위해 silicon기판대신 STS 304를 사용하고자 한다. STS 304를 태양전지용 기판으로 사용하기 위해서는 고도천 연마된 표면을 필수조건으로 하기 때문에 STS 304에 전해연마를 실시하여 AFM으로 표면의 거칠기를 살펴보았다 또 한, 표면 조도의 향상을 위해 최적의 연마조건에서 leveller를 첨가하였다. 인산($H_3PO_4$)을 기본으로 한 전해연마액에 2A의 전류와 극간거리 0.7cm의 조건하에서 STS 304의 최적 전해연마조건을 찾기 위해 전해액의 온도는 $80^{\circ}C{\sim}120^{\circ}C$, 연마시간은 3~2분간 전해연마를 실시하였다. 그 결과 2A/$cm^2$, $80^{\circ}C$, 10분에서 27.9nm의 표면조도를 보였으며, leveller로 사용된 glycerine, ethylene glycol, propylene glycol의 영향을 연구하였다. Leveller 중에서는 ethylene glycol을 0.4g/l 첨가하였을 때 표면조도가 약 15nm로서 그 효과가 가장 좋았다.

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기판 세정특성에 따른 표면 패시배이션 및 a-Si:H/c-Si 이종접합 태양전지 특성변화 분석 (Effect of Cleaning Processes of Silicon Wafer on Surface Passivation and a-Si:H/c-Si Hetero-Junction Solar Cell Performances)

  • 송준용;정대영;김찬석;박상현;조준식;송진수;왕진석;이정철
    • 한국재료학회지
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    • 제20권4호
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    • pp.210-216
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    • 2010
  • This paper investigates the dependence of a-Si:H/c-Si passivation and heterojunction solar cell performances on various cleaning processes of silicon wafers. It is observed that the passivation quality of a-Si:H thin-films on c-Si wafers depends highly on the initial H-termination properties of the wafer surface. The effective minority carrier lifetime (MCLT) of highly H-terminated wafer is beneficial for obtaining high quality passivation of a-Si:H/c-Si. The wafers passivated by p(n)-doped a-Si:H layers have low MCLT regardless of the initial H-termination quality. On the other hand, the MCLT of wafers incorporating intrinsic (i) a-Si:H as a passivation layer shows sensitive variation with initial cleaning and H-termination schemes. By applying the improved cleaning processes, we can obtain an MCLT of $100{\mu}sec$ after H-termination and above $600{\mu}sec$ after i a-Si:H thin film deposition. By adapting improved cleaning processes and by improving passivation and doped layers, we can fabricate a-Si:H/c-Si heterojunction solar cells with an active area conversion efficiency of 18.42%, which cells have an open circuit voltage of 0.670V, short circuit current of $37.31\;mA/cm^2$ and fill factor of 0.7374. These cells show more than 20% pseudo efficiency measured by Suns-$V_{oc}$ with an elimination of series resistance.