• Journal of Korea Society of Industrial Information Systems
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• v.20 no.1
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• pp.49-55
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• 2015

This paper proposes a 2.4 GHz RF oscillator with a very low close-in phase noise performance. This is composed of a low frequency crystal oscillator and three frequency multipliers such as two doubler (X2) and one tripler (X3). The proposed oscillator is implemented as a hybrid type circuit design using a discrete silicon bipolar transistor. The measurement results of the proposed oscillator structure show -115 dBc/Hz close-in phase noise at 10 kHz offset frequency, while only dissipating 5 mW from a 1-V supply. Its close-in phase noise level is very close to that of a low frequency crystal oscillator with little degradation of noise performance. The proposed structure which is consisted of a low frequency crystal oscillator and a frequency multiplier provides new method to implement a low power low close-in phase noise RF local oscillator.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.1
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• pp.1-8
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• 2022

Recently, photovoltaic (PV) systems have been gradually applied in eco-friendly vehicle applications to improve fuel economy. The relevant market is expected to continue to grow because the installation of large-capacity PV systems to other eco-friendly vehicles, such as electric buses and trains, is being considered. However, in a PV system, power imbalance between submodules and low power generation efficiency occur due to factors such as cell aging, contamination, and shading. To resolve this problem, various differential power processing (DPP) converters have been researched and developed. However, conventional DPP converters suffer from large volume and low efficiency. Therefore, to apply DPP converters to eco-friendly vehicles, increasing efficiency and reducing volume and price compared with existing DPP converters is necessary. In this paper, a novel DPP converter with an integrated transformer is proposed and analyzed. The proposed DPP converter uses a single magnetic component by integrating transformers and secondary sides of conventional DPP converters. Therefore, the proposed DPP converter shows high power density and high efficiency, and it is suitable for PV systems in eco-friendly vehicle applications.

• Proceedings of the KIEE Conference
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• 2003.04a
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• pp.163-165
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• 2003

Over the past several years, the application extent of the real-time systems is being expanded with the progress of civilization. An effort to minimize power consumption at the system is being accomplished in several fields from the design of an analog/digital circuit up to the device level Things of this effort have included the power optimum-technique to minimize power consumption at the digital logic circuit and the dynamic managed skill by means o( the decision of the operating system. In this paper, we designed of low power system by using Power-optimized method. As an effective low-power design, we designed the low power system which it has a monitoring system within the main board and a personal computer.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.62 no.3
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• pp.145-150
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• 2013

A novel AC to DC PWM converters with unity input power factor are proposed to overcome the above shortcoming. The main function of these converters is to shape the input line current to force it exactly in phase with the input AC voltage. Therefore, the input power factor can be improved to near unity and the input current harmonics can be eliminated. In this paper, half-bridge converter with two active switches and two diodes are utilized for low-cost type UPS configuration. By having only two semiconductors in the current path at any time, losses can be reduced over the conventional boost topology. Also, this converter provides controllable dc-link voltage, high power factor, and low cost type converter by simple power circuits. Simulation results show that the proposed half-bridge converter/inverter control technique can be applied to single-phase low-cost type UPS systems successfully.

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.1
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• pp.61-67
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• 2014

Conventional synchronous circuits in low power required systems such as sensor systems cannot only satisfy the timing requirement of the low voltage digital systems, but also they may generate wrong outputs under the influence of PVT variations and aging effects. Therefore, in the reliable ultra-low power design, asynchronous circuits have recently been reconsidered as a solution for scaling issues. However, it is not easy to totally replace synchronous circuits with asynchronous circuits in the digital systems, so the interfacing between the synchronous and asynchronous circuits is indispensable for the digital systems. This paper presents a new design for interfacing between asynchronous circuits and synchronous circuits, and the interface circuits are applied to a $4{\times}4$ multiplier logic designed using 0.11um technology.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.573-575
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• 1994

Resent research activities and technical trends for UPS(UNINTERRUPTIBLE POWER SUPPLY) are reviewed. There are increasing demands for UPS to get mote useful performance. This needs are high-efficiency, high-confidency, high-quality, low-cost. self-diagnosis. maintenance-free, and a wide variety of options. These can be satisfied with high-technology and optimal system coordination. In this paper. according to these demands. a newly developed UPS and a wide variety of options are introduced. Also. the data related are presented.

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.939-941
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• 2003

High Speed permanent magnet machines are currently being developed for a number of applications including gas turbine power plants, air conditioning systems, machine tools, gas pumps, high performance vacuum pumps, flywheel energy storage systems, aircraft fuel pumps, and so on. Using a high-speed machine eliminates the necessity of the mechanical gearbox and could certainly increase the system efficiency and reduce the total cost. In addition, a high-speed machine has the advantage of small dimension and low weight, i.e. low weight to power and volume to power ratio. This paper presents a review of some important applications (mostly still under development) where high-speed machines arc used, highlighting the advantages of the technology in each case.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.323-324
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• 2014

A higher-order power converter topology for an extremely low coupling (less than 0.15) transformer with high efficiency and wide air-gap (23 mm) is presented in this paper. Among the typical resonant converter topologies for contact-less power transferring systems, Series-Series Resonant Converter (SSRC) and Series-Parallel Resonant Converter (SPRC) are widely used in number of power electronic applications. However, when coupling coefficient of a transformer is seriously low (k<0.5), the series-series resonant converter will possibly operate at short circuited condition because of the small magnetizing impedance. To solve this problem, a modified and improved topology of seventh-order resonant converter for contact-less power converter system is proposed and the results are presented.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.11
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• pp.1596-1602
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• 2021

Battery-operated IoT devices in IoT systems require low power consumption. In general, IoT devices enter a sleep state synchronously to reduce power consumption. A problem arises when an IoT device has to handle asynchronous user requests, as the duty cycle must be reduced to enhance response time. In this paper, we propose a new low-power-consumption scheme, called Repetitive Wake-up scheme for IoT systems of asynchronous environments such as indoor lights control. The proposed scheme can reduce power consumption by sending wake-up signals from the smartphone repetitively and by retaining the IoT device in sleep state to the smallest possible duty cycle. In the various environments with IoT devices at home or office space, we showed that the proposed scheme can reduce power consumption by up to five times compared to the existing synchronous interlocking technique.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.7 no.3
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• pp.95-99
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• 2008

This paper proposes a new minimal resource high-level synthesis algorithm for low power design automation. The proposed algorithm executes an efficient approach to minimize the power consumption of the functional units in a circuit during the high level synthesis. In this paper, we visit all control steps one by one to reduce the switching activity in CDFG. The register sharing algorithm determines the minimum register after the life time analysis of all variable. According to property of input signal for functional unit, the proposed method visits all control step one by one and determines the resource allocation with minimal power consumption at each control step in a greedy fashion. The effect of the proposed algorithm has been proved through various filter benchmark to adopt a new scheduling and allocation algorithm considering the low rover.