• Title/Summary/Keyword: Low-Power Circuit Design

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13.56 MHz High Efficiency Class E Power Amplifier with Low Drain Voltage (낮은 드레인 전압을 가지는 13.56 MHz 고효율 Class E 전력증폭기)

  • Yi, Yearin;Jeong, Jinho
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.6
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    • pp.593-596
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    • 2015
  • In this paper, we design a high efficiency class E power amplifier operating at low drain bias voltage for wireless power transfers. A 13.56 MHz power amplifier is designed at drain bias voltage of 12.5 V using Si MOSFET with the breakdown voltage of 40 V. High quality-factor solenoidal inductor is designed and fabricated for use in output matching circuit to improve output power and efficiency. Input matching circuit simply consists of resistor and inductor to reduce the circuit area and improve the stability. The fabricated power amplifier shows the measured output power of 38.6 dBm with the gain of 16.6 dB and power added efficiency of 89.3 % at 13.56 MHz.

The Gyro High Voltage Power Supply Design for Attitude Control in the Satellite (저궤도 위성 자세제어용 자이로 고전압 발생기 설계)

  • Kim, Eui-Chan;Lee, Heung-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.3
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    • pp.403-408
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    • 2008
  • The gyroscope is the sensor for detecting the rotation in inertial reference frame and constitute the navigation system together an accelerometer. As the inertial reference equipment for attitude determination and control in the satellite, the mechanical gyroscope has been used but it bring the disturbance for mass unbalance so the disturbance give a bad influence to the observation satellite mission because the mechanical gyroscope has the rotation parts. During the launch. The mechanical gyroscope is weak in vibration, shock and has the defect of narrow operating temperature range so it need the special design in integration. Recently the low orbit observation satellite for seeking the high pointing accuracy of image camera payload accept the FOG(Fiber Optic Gyro) or RLG(Ring Laser Gyro) for the attitude determination and control. The Ring Laser Gyro makes use of the Sanac effect within a resonant ring cavity of a He-Ne laser and has more accuracy than the other gyros. It need the 1000V DC to create the He-Ne plasma in discharge tube. In this paper, the design process of the High Voltage Power Supply for RLG(Ring Laser Gyroscope) is described. The specification for High Voltage Power Supply (HVPS) is proposed. Also, The analysis of flyback converter topology is explained. The Design for the HVPS is composed of the inverter circuit, feedback control circuit, high frequency switching transformer design and voltage doubler circuit.

A Study on AC/DC Full Bridge Converter With Single Stage Circuit (단일전력단으로 구성된 AC/DC 풀 브리지 컨버터에 관한 연구)

  • Ahn, Byung-Moo;Kim, Yong;Kim, Pil-Soo;Lim, Nam-Hyuk;Chang, Sung-Won
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.1296-1299
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    • 2000
  • A single stage AC/DC converter based on a full bridge topology suitable for high frequency soft switching converter applications is proposed. The proposed converter has high power factor, zero voltage switching, low noise and high efficiency. A pulse width modulation control is employed to reduce the switching and rectification losses respectively. This proposal converter has simple structure and low cost, The modelling and detailed analysis are performed to derive the design equations, a prototype converter has been designed and experimented. The new converter is attractive for high-voltage, high-power applications where IGBT's are predominantly used as the power switches. The principle of operation, features, and design are verified on a 1.5kW, 30kHz, IGBT based experimental circuit.

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Low Cost Class-I Converter for Power Conversion Operation of Piezoelectric Transformer (전력용 압전 변압기 구동을 위한 저가형 클래스-E 컨버터)

  • Kim T. I.;Park J. H.;Lee S. M.;Choi S. J.;Cho B. H.
    • Proceedings of the KIPE Conference
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    • 2004.07b
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    • pp.696-699
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    • 2004
  • This paper proposes the Low Cost Class-E Converter with Power Conversion Operation of Piezoelectric Transformer. The Power Piezoelectric transformer capacity used in the proposed circuit is 15W and the electric equivalent circuit is presented. Class E type converter has some merits such as small component count, small size, and low cost. The topology has also ZVS conditions for main switch, thus in efficiency aspect, it is also competitive for commercial feasibility. The analysis and design guideline are suggested and also they are verified by experimental results.

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A Low Close-in Phase Noise 2.4 GHz RF Hybrid Oscillator using a Frequency Multiplier

  • Moon, Hyunwon
    • Journal of Korea Society of Industrial Information Systems
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    • v.20 no.1
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    • pp.49-55
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    • 2015
  • This paper proposes a 2.4 GHz RF oscillator with a very low close-in phase noise performance. This is composed of a low frequency crystal oscillator and three frequency multipliers such as two doubler (X2) and one tripler (X3). The proposed oscillator is implemented as a hybrid type circuit design using a discrete silicon bipolar transistor. The measurement results of the proposed oscillator structure show -115 dBc/Hz close-in phase noise at 10 kHz offset frequency, while only dissipating 5 mW from a 1-V supply. Its close-in phase noise level is very close to that of a low frequency crystal oscillator with little degradation of noise performance. The proposed structure which is consisted of a low frequency crystal oscillator and a frequency multiplier provides new method to implement a low power low close-in phase noise RF local oscillator.

Small-Signal Analysis of a Differential Two-Stage Folded-Cascode CMOS Op Amp

  • Yu, Sang Dae
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.6
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    • pp.768-776
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    • 2014
  • Using a simplified high-frequency small-signal equivalent circuit model for BSIM3 MOSFET, the fully differential two-stage folded-cascode CMOS operational amplifier is analyzed to obtain its small-signal voltage transfer function. As a result, the expressions for dc gain, five zero frequencies, five pole frequencies, unity-gain frequency, and phase margin are derived for op amp design using design equations. Then the analysis result is verified through the comparison with Spice simulations of both a high speed op amp and a low power op amp designed for the $0.13{\mu}m$ CMOS process.

Design of Fuse Elements of Current Sensing Type Protection Device for Portable Secondary Battery Protection System (휴대용 이차전지 보호 시스템용 전류 감지 동작형 보호소자의 퓨즈 가용체 설계)

  • Kang, Chang-Yong;Kim, Eun-Min
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.12
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    • pp.1619-1625
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    • 2018
  • Portable electronic devices secondary batteries can cause fire and explosion due to micro-current change in addition to the situation of short-circuit inrush current, safety can not be secured with a general operation limited current fuse. Therefore, in secondary battery, it is necessary for the protector to satisfy both the limit current type operation in the open-short-circuit inrush current and the current detection operation characteristic in the micro current change situation and for this operation, a fuse for the current detection type secondary battery protection circuit can be applied. The purpose of this study is to design a protection device that operates stably in the hazardous situation of small capacity secondary battery for portable electronic devices through the design of low melting fuse elements alloy of sensing type fuse and secures stability in abnormal current state. As a result of the experiment, I-T and V-T operation characteristics are satisfied in a the design of the alloy of the current sensing type self-contained low melting point fuse and the resistance of the heating resistor. It is confirmed that it can prevent accidents of short circuit over-current and micro current change of secondary battery.

The Originating Characteristics of Periodic Impulse Noises in the Data Communication System by Distribution Line Carrier Method (배전선반송 데이타통신에서의 주기적 임펄스노이즈의 발생특성)

  • 최순만;노창주
    • Journal of Advanced Marine Engineering and Technology
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    • v.18 no.2
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    • pp.75-82
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    • 1994
  • The existence of peroodic impulse noises in distribution line carrier (DLC) communication system is known to be the most serious obstacle for improving DLC communication quality in reliability and capacity. From the spectral points, impulse noises can be divided into baseband type and modulation type the noise width of whichs are much different each other. With each nose type, this study presents the basic characteristics in relation to what they originate from and how their spectrum properties are revealed. The baseband type impulse noise is normally caused from thyristor circuit running with low switching speed and the modulation type noise from the circuit of switching power supply. The base wave of modulation noise is shown to be the pulsuatic charging current to primary condenser in switching power circuit. The study result indicates also that placing the DLC carrier frequency away the band predominated by modulated noise especially from RCC type switching power circuit is very important in DLC design.

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A Design of 8bit 10MS/s Low Power Pipelined ADC (저전력 8비트 10MS/s 파이프라인 ADC 설계)

  • Bae, Sung-Hoon;Lim, Shin-Il
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.606-608
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    • 2006
  • This paper describes a 8bit 10MS/s low power pipelined analog-to-digital converter(ADC). To reduce power consumption in proposed ADC, a high gain op-amp that consumes large power in MDAC(multiplying DAC) of conventional pipelined ADC is replaced with simple comparator and current sources. Moreover, differential charge transfer amplifier technique with latch in the sub-ADC reduces the power consumption to less than half compared with the conventional sub-ADC which use high speed comparator. The proposed ADC shows the power consumption of 1.8mW at supply voltage of 1.8V. This proposed ADC is suitable to apply to the portable display device. The circuit was implemented with 0.18um CMOS technology and the core size of circuit is 2.5mm${\times}$1mm.

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CMOS High Speed Input Offset Canceling Comparator Design with Minimization of Charges Transfer (유동 전하량 최소화를 통한 입력 오프셋 제거 CMOS 고속 비교기의 설계)

  • 이수형;신경민;이재형;정강민
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.963-966
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    • 1999
  • This Paper describes the design of high speed and low power comparator based on the feed forward bias control. Major building blocks of this comparator are composed of input offset canceling circuit and feed forward bias control circuit. The usual offset canceling circuit cancels the offset voltages by storing them in capacitors using MOS switches, The comparator of this paper employs the bias control circuit which generates bias signal from the input signal. The bias signal is applied to the capacitors and keeps the transfer of chares in the capacitors in the minimal amount, therefore making the comparator operate in stable condition and reduce decision time. The comparator in this form has very samll area and power dissipation. Maximum sampling rate is 200 Ms/sec. The comparator is designed in 0.65${\mu}{\textrm}{m}$ technology and the offset is less than 0.5㎷.

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