• Title/Summary/Keyword: Low voltage Operation

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Mixed-mode simulation of transient characteristics of 4H-SiC DMOSFETs - Impact off the interface changes (Mixde-mode simulation을 이용한 4H-SiC DMOSFETs의 계면상태에서 포획된 전하에 따른 transient 특성 분석)

  • Kang, Min-Seok;Choe, Chang-Yong;Bang, Wook;Kim, Sang-Chul;Kim, Nam-Kyun;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.55-55
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    • 2009
  • Silicon Carbide (SiC) is a material with a wide bandgap (3.26eV), a high critical electric field (~2.3MV/cm), a and a high bulk electron mobility (${\sim}900cm^2/Vs$). These electronic properties allow high breakdown voltage, high frequency, and high temperature operation compared to Silicon devices. Although various SiC DMOSFET structures have been reported so far for optimizing performances. the effect of channel dimension on the switching performance of SiC DMOSFETs has not been extensively examined. In this paper, we report the effect of the interface states ($Q_s$) on the transient characteristics of SiC DMOSFETs. The key design parameters for SiC DMOSFETs have been optimized and a physics-based two-dimensional (2-D) mixed device and circuit simulator by Silvaco Inc. has been used to understand the relationship with the switching characteristics. To investigate transient characteristic of the device, mixed-mode simulation has been performed, where the solution of the basic transport equations for the 2-D device structures is directly embedded into the solution procedure for the circuit equations. The result is a low-loss transient characteristic at low $Q_s$. Based on the simulation results, the DMOSFETs exhibit the turn-on time of 10ns at short channel and 9ns at without the interface charges. By reducing $SiO_2/SiC$ interface charge, power losses and switching time also decreases, primarily due to the lowered channel mobilities. As high density interface states can result in increased carrier trapping, or recombination centers or scattering sites. Therefore, the quality of $SiO_2/SiC$ interfaces is important for both static and transient properties of SiC MOSFET devices.

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A Study on an Error Correction Code Circuit for a Level-2 Cache of an Embedded Processor (임베디드 프로세서의 L2 캐쉬를 위한 오류 정정 회로에 관한 연구)

  • Kim, Pan-Ki;Jun, Ho-Yoon;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.15-23
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    • 2009
  • Microprocessors, which need correct arithmetic operations, have been the subject of in-depth research in relation to soft errors. Of the existing microprocessor devices, the memory cell is the most vulnerable to soft errors. Moreover, when soft errors emerge in a memory cell, the processes and operations are greatly affected because the memory cell contains important information and instructions about the entire process or operation. Users do not realize that if soft errors go undetected, arithmetic operations and processes will have unexpected outcomes. In the field of architectural design, the tool that is commonly used to detect and correct soft errors is the error check and correction code. The Itanium, IBM PowerPC G5 microprocessors contain Hamming and Rasio codes in their level-2 cache. This research, however, focuses on huge server devices and does not consider power consumption. As the operating and threshold voltage is currently shrinking with the emergence of high-density and low-power embedded microprocessors, there is an urgent need to develop ECC (error check correction) circuits. In this study, the in-output data of the level-2 cache were analyzed using SimpleScalar-ARM, and a 32-bit H-matrix for the level-2 cache of an embedded microprocessor is proposed. From the point of view of power consumption, the proposed H-matrix can be implemented using a schematic editor of Cadence. Therefore, it is comparable to the modified Hamming code, which uses H-spice. The MiBench program and TSMC 0.18 um were used in this study for verification purposes.

Removal of Phenanthrene by Electrokinetic-Fenton Process in a 2-dimensional Soil System (동전기-펜턴 공정을 이용한 2차원 토양 정화장치에서의 phenanthrene 제거)

  • Park Ji-Yeon;Kim Sang-Joon;Lee You-Jin;Yang Ji-Won
    • Journal of Soil and Groundwater Environment
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    • v.10 no.5
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    • pp.11-17
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    • 2005
  • Characteristics of phenanthrene removal in the Electrokinetic (EK)-Fenton process were investigated in a 2-dimensional test cell in a viewpoint of the effect of gravity and electrosmotic flow (EOF). When the constant voltage of 100 V was applied to this system, the current decreased from 1,000 to 290 mA after 28 days, because soil resistance increased due to the exhaustion of ions in soil by electroosmosis and electromigration. Accumulated EOF in two cathode reservoirs was 10.3 L and the EOF rate was kept constant for 28 days. At the end of operation, the concentration of phenanthrene was observed to be very low near the anode and increased in the cathode region because hydrogen peroxide was supplied from anode to cathode region following the direction of EOP. Additionally, the concentration of phenanthrene decreased at the bottom of the test cell because the electrolyte solution containing hydrogen peroxide was largely transported toward the bottom due to a low capillary action in the soil with high porosity. Average removal efficiency of phenanthrene by EK-Fenton process was 81.4% for 28 days. In-situ EK-Fenton process would overcome the limitations of conventional remediation technologies and effectively remediate the contaminated sites.

Third order Sigma-Delta Modulator with Delayed Feed-forward Path for Low-power Operation (저전력 동작을 위한 지연된 피드-포워드 경로를 갖는 3차 시그마-델타 변조기)

  • Lee, Minwoong;Lee, Jongyeol
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.10
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    • pp.57-63
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    • 2014
  • This paper proposes an architecture of $3^{rd}$ order SDM(Sigma-Delta Modulator) with delayed feed-forward path in order to reduce the power consumption and area. The proposed SDM improve the architecture of conventional $3^{rd}$ order SDM which consists of two integrators. The proposed architecture can increase the coefficient values of first stage doubly by inserting the delayed feed-forward path. Accordingly, compared with the conventional architecture, the capacitor value($C_I$) of first integrator is reduced by half. Thus, because the load capacitance of first integrator became the half of original value, the output current of first op-amp is reduced as 51% and the capacitance area of first integrator is reduced as 48%. Therefore, the proposed method can optimize the power and the area. The proposed architecture in this paper is simulated under conditions which are supply voltage of 1.8V, input signal 1Vpp/1KHz, signal bandwidth of 24KHz and sampling frequency of 2.8224MHz in the 0.18um CMOS process. The simulation results are SNR(Signal to Noise Ratio) of 88.9dB and ENOB(Effective Number of Bits) of 14-bits. The total power consumption of the proposed SDM is $180{\mu}W$.

Development of Acid Resistance Velocity Sensor for Analyzing Acidic Fluid Flow Characteristics (산성 용액 내 유속 측정을 위한 내산성 센서 개발)

  • Choi, Gyujin;Yoon, Jinwon;Yu, Sangseok
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.40 no.10
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    • pp.629-636
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    • 2016
  • This study presents the development of an acid resistance velocity sensor that is used for measuring velocity inside a copper sulfate plating bath. First, researchers investigated the acid resistance coating to confirm the suitability of the anti-acid sensor in a very corrosive environment. Then, researchers applied signal processing methods to reduce noise and amplify the signal. Next, researchers applied a pressure-resistive sensor with an operation amplifier (Op Amp) and low-pass filter with high impedance to match the output voltage of a commercial flowmeter. Lastly, this study compared three low-pass filters (Bessel, Butterworth and Chebyshev) to select the appropriate signal process circuit. The results show 0.0128, 0.0023, and 5.06% of the mean square error, respectively. The Butterworth filter yielded more precise results when compared to a commercial flowmeter. The acid resistive sensor is capable of measuring velocities ranging from 2 to 6 m/s with a 2.7% margin of error.

Performance Evaluation of Magnesium Bipolar Plate in Lightweight PEM Fuel Cell Stack for UAV (무인기용 경량 PEM 연료전지 스택용 마그네슘 분리판의 성능평가)

  • Park, To-Soon;Oh, Ji-Hyun;Ryu, Tae-Kyu;Kwon, Se-Jin
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.41 no.10
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    • pp.788-795
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    • 2013
  • A magnesium bipolar plate whose surface was protected by thinly deposited silver layer was investigated as an alternative to existing graphite bipolar plate of PEM fuel cells. Thin silver layer of $3{\mu}m$ was deposited on a magnesium alloy substrate by physical vapor deposition (PVD) method in an environment of $180^{\circ}C$. A number of tests were conducted on the fabricated magnesium based bipolar plates to determine their suitability for use in PEM fuel cell stacks. The test on corrosion resistance in the same pH condition as in a PEM operation demonstrated the layer protected the magnesium alloy substrate, while unprotected substrate suffered from severe corrosion. The contact resistance of the fabricated bipolar plate was less than $20m{\Omega}-cm^2$ which was superior to the conventional bipolar plates. A single cell was constructed using the fabricated bipolar plates and power output was measured. Due to the enhanced conductivity caused by low contact resistance, slight increase was observed in current density and output voltage. With low density of the magnesium substrate and ease on machining, the weight reduction of the stack of 30~40 % is possible to produce the same power output.

Sterilization of Neurospora Crassa by Noncontacted Low Temperature Atmospheric Pressure Surface Discharged Plasma with Dielectric Barrier Structure (유전체장벽 방전구조의 비접촉식 저온 대기압 면방전 플라즈마를 이용한 빵곰팡이의 살균효과)

  • Ryu, Young Hyo;Uhm, Han Sup;Park, Gyung Soon;Choi, Eun Ha
    • Journal of the Korean Vacuum Society
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    • v.22 no.2
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    • pp.55-65
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    • 2013
  • Sterilization of Neurospora crassa has been investigated in this research by using a surface air plasma with dielectric barrier discharged (DBD) structure under atmospheric pressure. The sinusoidal alternating current has been used in this experiment with discharge voltage of 1.4~2.3 kV. The phase difference between the voltage and current signals are found to be almost 80 degree due to the capacitive property of dielectric barrier. Temperature on the biomaterials has been minimized by radiating the heat with the air cooling system. It is noted that the substrate temperature remains under 37 degree for plasma exposure time of 10 minutes with operation of cooler system. It is found that the ozone, $O_3$, has been measured to be about 25~30 ppm within 1 cm region and to be about 5 ppm at the 150 cm downstream region away from the suface plasma. It is also noted that the nitric oxide, NO, and nitric dioxide, $NO_2$, are not nearly detected. Germination rate and mitochodrial activity of Neurospora crassa immersed in the deionized water have been found to be drastically decreased as the plasma treatment time and its electrical power are increased in this experiment. Here, the mitochondrial activity has been analyzed by MTT (3-(4,5-dimethy lthiazol-2yl)-2,5-diphenyl-2H-tetrazolium bromide) assay. However, sterilization of Neurospora crassa immersed in the Vogel's minimal media has been found to be low by plasma treatment, which is caused by surrounding background solution. This research shows the sterilization possibility of Neurospora crassa by using the noncontated surface DBD plasma, which is different from the plasma jet. This is mainly attibuted to the reactive species generated by the surface plasma, since they play a major role for inhibition of micobes such as Neurospora crassa.

A 10b 200MS/s 75.6mW $0.76mm^2$ 65nm CMOS Pipeline ADC for HDTV Applications (HDTV 응용을 위한 10비트 200MS/s 75.6mW $0.76mm^2$ 65nm CMOS 파이프라인 A/D 변환기)

  • Park, Beom-Soo;Kim, Young-Ju;Park, Seung-Jae;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.3
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    • pp.60-68
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    • 2009
  • This work proposes a 10b 200MS/s 65nm CMOS ADC for high-definition video systems such as HDTV requiring high resolution and fast operating speed simultaneously. The proposed ADC employs a four-step pipeline architecture to minimize power consumption and chip area. The input SHA based on four capacitors reduces the output signal range from $1.4V_{p-p}$ to $1.0V_{p-p}$ considering high input signal levels at a low supply voltage of 1.2V. The proposed three-stage amplifiers in the input SHA and MDAC1 overcome the low output resistance problem as commonly observed in a 65nm CMOS process. The proposed multipath frequency-compensation technique enables the conventional RNMC based three-stage amplifiers to achieve a stable operation at a high sampling rate of 200MS/s. The conventional switched-bias power-reduction technique in the sub-ranging flash ADCs further reduces power consumption while the reference generator integrated on chip with optional off-chip reference voltages allows versatile system a locations. The prototype ADC in a 65nm CMOS technology demonstrates a measured DNL and INL within 0.19LSB and 0.61LSB, respectively. The ADC shows a maximum SNDR of 54.BdB and 52.4dB and a maximum SFDR of 72.9dB and 64.8dB at 150MS/S and 200MS/s, respectively. The proposed ADC occupies an active die area of $0.76mm^2$ and consumes 75.6mW at a 1.2V supply voltage.

The Developed Study for SMPS to Protect the Noise and Inrush Current at LED Lighting Source (LED 광원에서 잡음 및 돌입전류 방지를 위한 스위칭모드 전원공급 장치 (SMPS) 개발 연구)

  • Chung, Chansoo;Hong, Gyujang;We, Sungbok;Yu, Geonsu;Kim, Mijin
    • KEPCO Journal on Electric Power and Energy
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    • v.2 no.4
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    • pp.577-582
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    • 2016
  • This Study focused on the development of SMPS (Switching Mode Power Supply) to supply the constant votage and current nevertheless LED fluorescent Light generated the electric noise (with Harmonics) and Inrush current at instant time of turn-on and off. Recently, according to the Green policy in government, the LED fluorescent Lighter showed the rapidly increasing tend as indoor and outdoor Lighter. But, because of costs, LED fluorescent Light not considered and neglected the following items; power factor, efficiency, Harmonics and Inrush current. So, we are developed the SMPS about 3 key issues as follows: 1st, power factor and efficiency is 85%. 2nd, the switching noisy by harmonic is minimized. 3rd, the Inrush current at turn on and off time is reduced the minimum 0.3 A after $100{\mu}sec$ on turnon time. The proposed SMPS adjusted by LNK 409 driver (included the high frequency modulation function). Although, the developed SMPS maintained the about 85% of power factor and efficiency. but, the SMPS must be generated low heat by the variation of minute load current at switching timing. To improve the above weak point, the developed SMPS have the feedback monitoring circuit between input side and output side to maintain the power factor and efficiency. Also, we are studied the time-constant of control circuit to output the constant voltage and current nevertheless the load disturbance of LED lighting. The LED fluorescent Light of 46W is checked the above items.

Removal of Nitrate-Nitrogen in Pickling Acid Wastewater from Stainless Steel Industry Using Electrodialysis and Ion Exchange Resin (전기투석과 이온교환수지를 이용한 스테인레스 산업의 산세폐수 내 질산성 질소의 제거)

  • Yun, Young-Ki;Park, Yeon-Jin;Oh, Sang-Hwa;Shin, Won-Sik;Choi, Sang-June;Ryu, Seung-Ki
    • Journal of Environmental Science International
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    • v.18 no.6
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    • pp.645-654
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    • 2009
  • Lab-scale Electrodialysis(ED) system with different membranes combined with before or after pyroma process were carried out to remove nitrate from two pickling acid wastewater containing high concentrations of $NO_3\;^-$(${\approx}$150,000 mg/L) and F($({\approx}$ 160,000 mg/L) and some heavy metals(Fe, Ti, and Cr). The ED system before Pyroma process(Sample A) was not successful in $NO_3\;^-$ removal due to cation membrane fouling by the heavy metals, whereas, in the ED system after Pyroma process(Sample B), about 98% of nitrate was removed because of relatively low $NO_3\;^-$ concentration (about 30,000 mg/L) and no heavy metals. Mono-selective membranes(CIMS/ACS) in ED system have no selectivity for nitrate compared to divalent-selective membranes(CMX/AMX). The operation time for nitrate removal time decreased with increasing the applied voltage from 10V to 15V with no difference in the nitrate removal rate between both voltages. Nitrate adsorption of a strong-base anion exchange resin of $Cl\;^-$ type was also conducted. The Freundlich model($R^2$ > 0.996) was fitted better than Langmuir mode($R^2$ > 0.984) to the adsorption data. The maximum adsorption capacity ($Q^0$) was 492 mg/g for Sample A and 111 mg/g for Sample B due to the difference in initial nitrate concentrations between the two wastewater samples. In the regeneration of ion exchange resins, the nitrate removal rate in the pickling acid wastewater decreased as the adsorption step was repeated because certain amount of adsorbed $NO_3\;^-$ remained in the resins in spite of several desorption steps for regeneration. In conclusion, the optimum system configuration to treat pickling acid wastewater from stainless-steel industry is the multi-processes of the Pyroma-Electrodialysis-Ion exchange.