• ETRI Journal
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• v.16 no.4
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• pp.1-11
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• 1995

A GaAs power metal semiconductor field effect transistor (MESFET) operating at a voltage as low as 3.3V has been developed with the best performance for digital handheld phone. The device has been fabricated on an epitaxial layer with a low-high doped structure grown by molecular beam epitaxy. The MESFET, fabricated using $0.8{\mu}m$ design rule, showed a maximum drain current density of 330 mA/mm at $V_{gs}$ =0.5V and a gate-to-drain breakdown volt-age of 28 V. The MESFET tested at a 3.3 V drain bias and a 900 MHz operation frequency displayed an output power of 32.5-dBm and a power added efficiency of 68%. The associate power gain at 20 dBm input power and the linear gain were 12.5dB and 16.5dB, respectively. Two tone testing measured at 900.00MHz and 900.03MHz showed that a third-order intercept point is 49.5 dBm. The power MESFET developed in this work is expected to be useful as a power amplifying device for digital hand-held phone because the high linear gain can deliver a high power added efficiency in the linear operation region of output power and the high third-order intercept point can reduce the third-order intermodulation.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1491-1492
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• 2011

In this study, we investigated about the effect of hole transport layer materials(${\alpha}$-NPD, TPD) depending on the electrical properties of organic light emitting diode. In deposition method, we used thermal evaporation and it was a method for performing thin film by attaching vaporizing a molecule to substrate in a high thermal and vaccum. We analyzed luminance, current density, external quantum efficiency and current efficiency in 40 [nm] as optimization thickness of ${\alpha}$-NPD and TPD. In result of experiment, maximum luminance of TPD had 1.1 times higher than ${\alpha}$-NPD, but ${\alpha}$-NPD had luminance, external quantum efficiency, and current efficiency higher than TPD in low operating voltage. Actually, ${\alpha}$-NPD had efficiency higher than TPD in low operating voltage.

• Journal of the Korean Society of Safety
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• v.37 no.6
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• pp.1-8
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• 2022

This study analyzed the characteristics of insulation resistance and operating time based on an accelerated degradation test of a low-voltage circuit breaker. The experimental sample used a molded case circuit breaker (MCCB) and an earth leakage circuit breaker (ELCB). After measuring the insulation resistance of the circuit breakers, the leakage current was affected by an external rather than an internal structure. Furthermore, the insulation resistance of the circuit breakers with accelerated degradation was measured using a Megger insulation tester. In the accelerated degradation test, aging times of five, ten, 15, and 20 years were applied according to a temperature derived using the Arrhenius equation. Circuit breakers with an equivalent life of ten, 15, and 20 years had increased insulation resistance compared to those with less degradation time. In particular, the circuit breaker with an equivalent life of ten years had the highest insulation resistance. Component analysis of the circuit breaker manufactured through an accelerated degradation test confirmed that the timing of the increase in insulation resistance and the time of additive loss were the same. Finally, after analyzing the operating time of the circuit breakers with degradation, it was confirmed that the MCCB did not change, but the ELCB breaker failed.

• Journal of IKEEE
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• v.20 no.3
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• pp.265-272
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• 2016

A SCALDO(Supercapacitor Assisted LDO) regulator is a newly studied regulator to improve the efficiency of a LDO regulator. Commonly a LDO regulator has very low efficiency and a SCALDO regulator can improve it considerably because this regulator can reuse meaninglessly wasted energy at the LDO regulator by a supercapacitor witch is attached between input and a LDO regulator. However this regulator has several challenges because it is a being studied regulator. One of them is an overvoltage issue. At initial operating of this regulator, a supercapacior is totally discharged and input is connected with a supercapacitor and a LDO regulator in series. Thus, input voltage is enabled to a LDO regulator and this input voltage is a significant value to a LDO regulator because commonly input voltage is bigger than twice output voltage. In this paper, to solve this overvoltage issue, we proposed a new SCALDO regulator that has a pre-charger for charging a supercapacitor before starting operation. And we found that a proposed SCALDO regulator can properly reduce overvoltage of a LDO regulator through experiments.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.6C
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• pp.561-570
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• 2009

Ultra-wideband communication systems based on impulse radio have merits that are possible for the high data rate transmission, high resolution ranging are positioning system. Conventionally, in order to accomplish these features, the high-speed ADC (Analog to Digital Convertor) is necessary to apply radio determination system operating in time domain. However, considering low rate - wireless personal area network (LR-WPAN) aims to low-cost hardware implementation, the expensive ADC converting GHz sampling per second is not appropriate. So, this paper introduces a low complex AR (Auto Regressive) model based non-coherent ranging scheme operating in frequency domain with using low-speed ADC utilizing analog Voltage Control Oscillator (VCO) mode for the frequency domain transformation. To verify the superiority of the proposed ranging and location algorithm working in frequency domain, the suggested IEEE 802.15.4a TG channel model is used to exploit affirmative features of the proposed algorithm with conducting the simulation results.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.1
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• pp.78-85
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• 2008

Most researches for power management have focused on increasing the utilization of system performance by scaling operating frequency or operating voltage. If operating frequency is changed frequently, it reduces the real system performance. To reduce power consumption, alternative approaches use the limited number of operating frequencies or set the smoothing frequencies during execution to increase the system performance, but they are not suitable for real time applications. To reduce power consumption and increase system performance for real time applications, this paper proposes a new power-aware schedule method by allocating operating frequencies and by setting smoothing frequencies. The algorithm predicts so that frequencies with continuous interval are mapped into discrete operating frequencies. The frequency smoothing reduces overheads of systems caused by changing operating frequencies frequently as well as power consumption caused by the frequency mismatch at a wide frequency interval. The simulation results show that the proposed algorithm reduces the power consumption up to 40% at maximum and 15% on average compared to the CC RT-DVS.

• KIEE International Transactions on Power Engineering
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• v.3A no.1
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• pp.17-26
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• 2003

In this paper, the comparative steady-state operating performance analysis algorithms of the stand-alone single-phase self-excited induction generator (SEIG) is presented on the basis of the two nodal admittance approaches using the per-unit frequency in addition to a new state variable de-fined by the per-unit slip frequency. The main significant features of the proposed operating circuit analysis with the per-unit slip frequency as a state variable are that the fast effective solution could be achieved with the simple mathematical computation effort. The operating performance results in the simulation of the single-phase SEIG evaluated by using the per-unit slip frequency state variable are compared with those obtained by using the per-unit frequency state variable. The comparative operating performance results provide the close agreements between two steady-state analysis performance algorithms based on the electro-mechanical equivalent circuit of the single-phase SEIG. In addition to these, the single-phase static VAR compensator; SVC composed of the thyristor controlled reactor; TCR in parallel with the fixed excitation capacitor; FC and the thyristor switched capacitor; TSC is ap-plied to regulate the generated terminal voltage of the single-phase SEIG loaded by a variable inductive passive load. The fixed gain PI controller is employed to adjust the equivalent variable excitation capacitor capacitance of the single-phase SVC.

• Journal of the Semiconductor & Display Technology
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• v.19 no.4
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• pp.6-10
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• 2020

The silver nanowires (AgNWs) were synthesized by the conventional polyol process, which revealed 25 ㎛ and 30 nm of average length and diameter, respectively. The synthesized AgNWs were applied to the CdSe/CdZnS quantum dot (QD) based transparent light-emitting device (LED). The device using a randomly networked AgNWs electrode had some problems such as the high threshold voltage (for operating the device) due to the random pores from the networked AgNWs. As a method of improvement, a composite electrode was formed by overlaying the ZnO:Ga on the AgNWs network. The device used the composite electrode revealed a low threshold voltage (4.4 Vth) and high current density compared to the AgNWs only electrode device. The brightness and current density of the device using composite electrode were 55.57 cd/㎡ and 41.54 mA/㎠ at the operating voltage of 12.8 V, respectively, while the brightness and current density of the device using (single) AgNWs only were 1.71 cd/㎡ and 2.05 mA/㎠ at the same operating voltage. The transmittance of the device revealed 65 % in a range of visible light. Besides the reliability of the devices was confirmed that the device using the composite electrode revealed 2 times longer lifetime than that of the AgNWs only electrode device.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.2
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• pp.71-77
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• 2015

Upcoming ground-breaking applications for always-on tiny interconnected devices steadily demand two-fold features of processor cores: aggressively low power consumption and enhanced performance. We propose implementation of a novel superscalar low-power processor core with a low supply voltage. The core implements intra-core low-power microarchitecture with minimal performance degradation in instruction fetch, branch prediction, scheduling, and execution units. The inter-core lockstep not only detects malfunctions during low-voltage operation but also carries out software-based recovery. The chip incorporates a pair of cores, high-speed memory, and peripheral interfaces to be implemented with a 65nm node. The processor core consumes only 24mW at 350MHz and 0.68V, resulting in power efficiency of $80{\mu}W/MHz$. The operating frequency of the core reaches 850MHz at 1.2V.

• Proceedings of the KIPE Conference
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• 1997.07a
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• pp.239-242
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• 1997

In this paper, the new filter that reduced output ripple to zero is proposed. This filter is composed of transformer and capacitor. The operating mode is verified with theoretical analysis of low ripple filter and computer simulation. DC-DC converter of input voltage DC 100[V], output 30[V]/30[A], switching frequency 20[KHz] is manufactured. In the result, computer simulation analysis is same to experimental result.