• Title/Summary/Keyword: Low delay

Search Result 1,838, Processing Time 0.029 seconds

A Research on Low-power Buffer Management Algorithm based on Deep Q-Learning approach for IoT Networks (IoT 네트워크에서의 심층 강화학습 기반 저전력 버퍼 관리 기법에 관한 연구)

  • Song, Taewon
    • Journal of Internet of Things and Convergence
    • /
    • v.8 no.4
    • /
    • pp.1-7
    • /
    • 2022
  • As the number of IoT devices increases, power management of the cluster head, which acts as a gateway between the cluster and sink nodes in the IoT network, becomes crucial. Particularly when the cluster head is a mobile wireless terminal, the power consumption of the IoT network must be minimized over its lifetime. In addition, the delay of information transmission in the IoT network is one of the primary metrics for rapid information collecting in the IoT network. In this paper, we propose a low-power buffer management algorithm that takes into account the information transmission delay in an IoT network. By forwarding or skipping received packets utilizing deep Q learning employed in deep reinforcement learning methods, the suggested method is able to reduce power consumption while decreasing transmission delay level. The proposed approach is demonstrated to reduce power consumption and to improve delay relative to the existing buffer management technique used as a comparison in slotted ALOHA protocol.

A Study on the Queueing priority in Communication Network (통신망에 있어서의 큐잉우선도에 관한 연구)

  • 김영동;이재호;송영재
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.10 no.5
    • /
    • pp.218-228
    • /
    • 1985
  • The input messages in communication network are processed according to their priority. If the messages which are had different types of priority are excessively entered to communication network in such prioruty process, and if high priority messages are continuously entered, the messages which are had law priority are experinenced delay beyond their priority. In this case, we proposed average delay compensation method to compensate contonuous delay in low priority messages.

  • PDF

An Analytical Switching-Dependent Timing Model for Multi-Coupled VLSI Interconnect lines (디커플링 방법을 이용한 RC-Coupled 배선의 해석적 지연시간 예측 모델)

  • Kim, Hyun-Sik;Eo, Yung-Seon;Shim, Jong-In
    • Proceedings of the IEEK Conference
    • /
    • 2004.06b
    • /
    • pp.439-442
    • /
    • 2004
  • Timing delays due to VLSI circuit interconnects strongly depend on neighbor line switching patterns as well as input transition time. Considering both the input transition and input switching pattern, a new analytical timing delay model is developed by using the decoupling technique of transfer multi-coupled lines into an effective single line. The analytical timing delay model can determine the timing delay of multi-coupled lines accurately as well as rapidly. It is verified by using DSM-Technology ($0.1{\mu}m$ /low-k copper-based process) that the model has excellent agreement with the results of SPICE simulation.

  • PDF

Design of Low Powered Delay Insensitive Data Transfers based on Current-Mode Multiple Valued Logic (GALS 시스템용 전류 모드 다치 논리 회로 기반 저전력 지연무관 데이터 전송 회로 설계)

  • Oh, Myeong-Hoon;Shin, Chi-Hoon;Har, Dong-Soo
    • Proceedings of the IEEK Conference
    • /
    • 2005.11a
    • /
    • pp.723-726
    • /
    • 2005
  • GALS (Globally Asynchronous Locally Synchronous) 시스템 기반의 SoC 설계에 필수적인 DI (Delay Insensitive) 데이터 전송방식 중 기존의 전압 모드 기반 설계 방식은 N 비트 데이터 전송에 물리적으로 2N+1 개의 도선이 필요하다. 이로 인한 전력 소모와 설계 복잡성을 줄이기 위해 N+1 개의 도선으로 N 비트 데이터를 전송할 수 있는 전류 모드 다치 논리 회로 기반 설계 방식이 연구되었다. 그러나, static 전력의 비중이 커 데이터 전송 속도가 낮을수록 전력 소모 측면에서 취약하고, 휴지 모드에서도 상당량의 전력을 소비한다. 본 논문에서는 이러한 문제점을 해결할 수 있는 전류 모드 기반 인코더와 디코더 회로를 제안하고, 이에 따른 새로운 전류 인코딩 기법을 설명한다. 마지막으로 기존의 전압 모드 및 전류 모드 방식과 delay, 전력 소비 측면에서 비교 데이터를 제시한다.

  • PDF

Tropospheric Anomaly Detection in Multi-reference Stations Environment during Localized Atmosphere Conditions-(1) : Basic Concept of Anomaly Detection Algorithm

  • Yoo, Yun-Ja
    • Journal of Navigation and Port Research
    • /
    • v.40 no.5
    • /
    • pp.265-270
    • /
    • 2016
  • Extreme tropospheric anomalies such as typhoons or regional torrential rain can degrade positioning accuracy of the GPS signal. It becomes one of the main error terms affecting high-precision positioning solutions in network RTK. This paper proposed a detection algorithm to be used during atmospheric anomalies in order to detect the tropospheric irregularities that can degrade the quality of correction data due to network errors caused by inhomogeneous atmospheric conditions between multi-reference stations. It uses an atmospheric grid that consists of four meteorological stations and estimates the troposphere zenith total delay difference at a low performance point in an atmospheric grid. AWS (automatic weather station) meteorological data can be applied to the proposed tropospheric anomaly detection algorithm when there are different atmospheric conditions between the stations. The concept of probability density distribution of the delta troposphere slant delay was proposed for the threshold determination.

The Analysis and Compensation of Switching Time Delay in PWM Inverters (PWM인버터에서 스위칭시간지연이 미치는 효과의 분석 및 그 보상)

  • 박민호;홍순찬;정승기
    • The Transactions of the Korean Institute of Electrical Engineers
    • /
    • v.40 no.1
    • /
    • pp.58-66
    • /
    • 1991
  • In inverters, time delays are inserted in the switching signals to prevent the dc lind shortage. This causes detrimental effects on the performance of the inverters, that is, the fundamental voltage drop and the generation of low order harmonics. This paper derives simple formula to describe the time delay effects in PWM inverters, where the effects may become significant because of relatively high switching frequencies. To compensate the tice delay effects, this paper presents two methods which are suitable for sinusoidal PWM and memory-based PWM respectively. Both are simple, easy to implement, and are shown to be effective, through the experiments, in improving the output waveform of PWM inverters.

  • PDF

New Permanent Magnet Synchronous Motor Current Sensing Phase Delay Compensation Method

  • Park, Sei-Hun;Kim, Il-Hwan
    • Journal of Electrical Engineering and Technology
    • /
    • v.11 no.1
    • /
    • pp.241-246
    • /
    • 2016
  • This paper presents a method that can improve the performance of permanent magnet synchronous motor current control by minimizing the measured current phase delay caused by the Low Pass Filter(LPF) used to cut off the noises that flowed in when feedback currents are measured. Although existing methods that change the Cutoff Frequency of the LPF can minimize phase delays during high speed rotations, their noise cutoff effects are much lower and this may lead to the decline of control performance. Therefore, in this study, an algorithm that can compensate current phase delays through relatively simple calculations from the synchronous motor d-q axis coordinate transformation matrix and the inverse transformation matrix is proposed and the validity of the proposed method is verified by comparing the waveform of the calculated current with the waveform of actual currents through simulations and experiments.

FEAPT Algorithm to compensate Jitter in Internet Phone (인터넷전화에서 지터보상을 위한 Frame Extension for Adaptive Playout Time(FEAPT) 알고리즘)

  • 남재현
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.7 no.6
    • /
    • pp.1168-1176
    • /
    • 2003
  • Internet telephony service is very cheap and very easy to introduce the value-added service than the POTS, but is difficult to the QoS of telephone service. The existing internet typically offers "best effort" services only, which do not make any commitment about delay, packet loss and jitter. This paper compensates the low quality of the speech for packet loss or delay using FEAPT algorithm in Internet phone. In the FEAPT algorithm, the receiver expands the received packet under resonable threshold, and hence compensates the QoS of speech.of speech.

2nd Order Deadbeat Controller Considering Calculation Time Delay and Sensitivity for UPS Inverter (연산시간지연 및 민감성을 고려한 UPS 인버터용 2차 데드비트 제어기)

  • Kim, Byoung-Jin;Choi, Jae-Ho;Jain , Amit
    • The Transactions of the Korean Institute of Electrical Engineers B
    • /
    • v.50 no.4
    • /
    • pp.170-178
    • /
    • 2001
  • Deadbeat technique has been proposed as a digital controller for an UPS inverter to achieve the fast, response to a load variation and to conserve a very low THD under a nonlinear load condition. This scheme contains a fatal drawback, sensitivity against parameter variation and calculation time delay. This paper proposes a second order deadbeat controller, which fundamentally solves the calculation time delay problem and certainly guarantees the robustness of the parameter's variation. RLP(Repetitive Load Predictor) which predicts the load current ahead of two sampling time and FVR(Fundamental Voltage Regulator) which eliminates the fundamental errors of the output voltage are also proposed for the second order deadbeat controller to apply to UPS inverter systems. These are shown theoretically and practically through simulation and experiment.

  • PDF

Rate Proportional SCFQ Algorithm for High-Speed Packet-Switched Networks

  • Choi, Byung-Hwan;Park, Hong-Shik
    • ETRI Journal
    • /
    • v.22 no.3
    • /
    • pp.1-9
    • /
    • 2000
  • Self-Clocked Fair Queueing (SCFQ) algorithm has been considered as an attractive packet scheduling algorithm because of its implementation simplicity, but it has unbounded delay property in some input traffic conditions. In this paper, we propose a Rate Proportional SCFQ (RP-SCFQ) algorithm which is a rate proportional version of SCFQ. If any fair queueing algorithm can be categorized into the rate proportional class and input is constrained by a leaky bucket, its delay is bounded and the same as that of Weighted Fair Queueing (WFQ) which is known as an optimal fair queueing algorithm. RP-SCFQ calculates the timestamps of packets arriving during the transmission of a packet using the current value of system potential updated at every packet departing instant and uses a starting potential when it updates the system potential. By doing so, RP-SCFQ can have the rate proportional property. RP-SCFQ is appropriate for high-speed packet-switched networks since its implementation complexity is low while it guarantees the bounded delay even in the worst-case input traffic conditions.

  • PDF