• Title/Summary/Keyword: Low area

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Charge Pump Circuits with Low Area and High Power Efficiency for Memory Applications

  • Kang, Kyeong-Pil;Min, Kyeong-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.4
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    • pp.257-263
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    • 2006
  • New charge pump circuits with low area and high power efficiency are proposed and verified in this paper. These pump circuits do not suffer the voltage stress higher than $V_{DD}$ across their pumping capacitors. Thus they can use the thin-oxide MOSFETs as the pumping capacitors. Using the thin-oxide capacitors can reduce the area of charge pumps greatly while keeping their driving capability. Comparing the new pump (NCP-2) with the conventional pump circuit using the thick-oxide capacitors shows that the power efficiency of NCP-2 is the same with the conventional one but the area efficiency of NCP-2 is improved as much as 71.8% over the conventional one, when the $V_{PP}/V_{DD}$ ratio is 3.5 and $V_{DD}$=1.8V.

A Low Power, Small Area Cyclic Time-to-Digital Converter in All-Digital PLL for DVB-S2 Application

  • Kim, Hongjin;Kim, SoYoung;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.2
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    • pp.145-151
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    • 2013
  • In this paper, a low power, small area cyclic time-to-digital converter in All-Digital PLL for DVB-S2 application is presented. Coarse and fine TDC stages in the two-step TDC are shared to reduce the area and the current consumption maintaining the resolution since the area of the TDC is dominant in the ADPLL. It is implemented in a 0.13 ${\mu}m$ CMOS process with a die area of 0.12 $mm^2$. The power consumption is 2.4 mW at a 1.2 V supply voltage. Furthermore, the resolution and input frequency of the TDC are 5 ps and 25 MHz, respectively.

Low-area FFT Processor Structure using Common Sub-expression Sharing (Common Sub-expression Sharing을 사용한 저면적 FFT 프로세서 구조)

  • Jang, Young-Beom;Lee, Dong-Hoon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.4
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    • pp.1867-1875
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    • 2011
  • In this paper, a low-area 256-point FFT structure is proposed. For low-area implementation CSD(Canonic Signed Digit) multiplier method is chosen. Because multiplication type should be less for efficient CSD multiplier application to the FFT structure, the Radix-$4^2$ algorithm is chosen for those purposes. After, in the proposed structure, the number of multiplication type is minimized in each multiplication block, the CSD multipliers are applied for implementation of multiplication. Furthermore, in CSD multiplier implementation, cell-area is more reduced through common sub-expression sharing(CSS). The Verilog-HDL coding result shows 29.9% cell area reduction in the complex multiplication part and 12.54% cell area reduction in overall 256-point FFT structure comparison with those of the conventional structure.

Song Variations of Great Tits Inhabiting Chirisan and Ullungdo (지리산과 울릉도에서 서식하는 박새 Song의 변이)

  • Hahm, Kye-Hwang;Woon-Kee paek
    • The Korean Journal of Ecology
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    • v.17 no.2
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    • pp.213-222
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    • 1994
  • Songs recorded in Chirisam(1990~1993) and $Ull\v{u}ngdo$(1992~1993) areas were analyzed to investigate the features and variances in songs of Great tit, Parus major. Songs of Great tits were identified, most of which were repetitions of phrases composed of high-frequency note and low-frequency note. The CV range of the Chirisan Great tit group was wider than that of the $Ull\v{u}ngdo$ area. ANOVA analysis level was highly significant (p<0.0001) for Chirisan area and $Ull\v{u}ngdo$ area. Inter-regional variance level was significant (p<0.05) in the maximum of low-frequency.

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Optimal Layout Methods for MOSFETs of Ultra Low Resistance (초저저항 MOS 스위치의 최적 배치설계)

  • Kim , Joon-Yub
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.51 no.12
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    • pp.596-603
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    • 2002
  • New layout methods for implementing MOS switches of ultra low channel resistance are presented. These area-effective layout methods include the waffle structure, zipper structure, star zag structure and fingered waffle structure. The design equations for these new layout structures are analyzed. The area-effectiveness of these structures is compared with that of the conventional alternating bar structure. MOS switches of the waffle structure were fabricated using a standard 0.25um CMOS process. The experimental characterization results of the fabricated MOS switches are presented. The analytical comparison and experimental results show that area reductions over 40% are achievable with the new structures.

The Role of the Cricopharyngeus Muscle in Pitch Control - Electromyographic and radiographic studies

  • Hong, Ki-Hwan;Kim, Hyun-Ki;Yang, Yoon-Soo
    • Speech Sciences
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    • v.11 no.1
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    • pp.73-83
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    • 2004
  • Electromyographic studies of the cricopharyngeus muscle using hooked wire electrodes were performed in thyroidectomized patients. The shape of the cricoid cartilage and soft tissue thickness in the postcricoid area were evaluated during pitch elevation and pitch lowering using conventional neck lateral films. The cricopharyngeus muscle simultaneously activated in the initial task of speech and continuously activated. Its activity lessened in the interrogative stress contrast of sentence terminals and increased in the pitch lowered contrast of sentence terminal. On the radiologic findings the cricoid cartilage was tilted backward during high pitched phonation and tilted forward during low pitched phonation. The soft tissue thickness of postcricoid area was thicker at the low pitch than at high pitch. At low pitch the cricoid cartilage paralleled along the vertebral column. This result suggests that the bulging of cricopharyngeus muscle in contraction induce a thickened the postcricoid area thickened, and exert pressure anteriorly exerted on the cricoid cartilage. This contraction of the cricopharyngeus muscle may result in shortening the vocal fold and lowering pitch.

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A 3.3-V Low-Power Compact Driver for Multi-Standard Physical Layer

  • Park, Joon-Young;Lee, Jin-Hee;Jeong, Deog-Kyoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.1
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    • pp.36-42
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    • 2007
  • A low-power compact driver for multistandard physical layer is presented. The proposed driver achieves low power and small area through the voltage-mode driver with trans-impedance configuration and the novel hybrid driver,. In the voltage-mode driver, a trans-impedance configuration alleviates the problem of limited common-mode range of error amplifiers and the area and power overhead due to pre-amplifier. For a standard with extended output swing, only current sources are added in parallel with the voltage-mode driver, which is named a 'hybrid driver'. The hybrid architecture not only increases output swing but reduces overall driver area. The overall driver occupies $0.14mm^2$. Power consumptions under 3.3-V supply are 24.5 mW for the voltage-mode driver and 44.5 mW for the hybrid driver.

Low Power and Small Area Source Driver Using Low Temperature Poly-Si(LTPS) Thin Film Transistors(TFTs) for Mobile Displays

  • Hong, Sueng-Kyun;Byun, Chun-Won;Yoon, Joong-Sun;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.833-836
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    • 2007
  • A low power and small area source driver using LTPS TFTs is proposed for mobile applications. This source driver adopts level shifter with holding latch function and new R-to-R type digital-to-analog converter (DAC). The power consumption and layout area of the proposed source driver are reduced by 23% and 25% for 16M colors and qVGA AM-OLED panel, respectively.

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Development of Sensor Fusion-Based Low-Speed Short-Distance Collision Warning Algorithm for Urban Area (도시 환경을 위한 센서 융합 기반 저속 근거리 충돌 경보 알고리즘 개발)

  • Jeon, Jong-Ki;Kim, Man-Ho;Lee, Suk;Lee, Kyung-Chang
    • IEMEK Journal of Embedded Systems and Applications
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    • v.6 no.3
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    • pp.157-167
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    • 2011
  • Although vehicles become more intelligent for convenience and safety of drivers, traffic accidents are increased more and more. Especially, car-to-car single rear impacts in the urban area are increased rapidly because of driver inattention. To prevent rear impacts in the urban area, commercial automobile vendor applies the low-speed short-distance collision warning system. This paper presents low-speed short-distance collision warning algorithm for the city driving by using sensor fusion of laser sensor and ultrasonic sensor. An experiment using embedded microprocessor in the driving track was used to demonstrate the feasibility of the collision warning algorithm.

Design and performance prediction of large-area hybrid gamma imaging system (LAHGIS) for localization of low-level radioactive material

  • Lee, Hyun Su;Kim, Jae Hyeon;Lee, Junyoung;Kim, Chan Hyeong
    • Nuclear Engineering and Technology
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    • v.53 no.4
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    • pp.1259-1265
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    • 2021
  • In the present study, a large-area hybrid gamma imaging system was designed by adopting coded aperture imaging on the basis of a large-area Compton camera to achieve high imaging performance throughout a broad energy range (100-2000 keV). The system consisting of a tungsten coded aperture mask and monolithic NaI(Tl) scintillation detectors was designed through a series of Geant4 Monte Carlo radiation transport simulations, in consideration of both imaging sensitivity and imaging resolution. Then, the performance of the system was predicted by Geant4 Monte Carlo simulations for point sources under various conditions. Our simulation results show that the system provides very high imaging sensitivity (i.e., low values for minimum detectable activity, MDA), thus allowing for imaging of low-activity sources at distances impossible with coded aperture imaging or Compton imaging alone. In addition, the imaging resolution of the system was found to be high (i.e., around 6°) over the broad energy range of 59.5-1330 keV.